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seL4/tools/dts/quartz64.dts
Peter S. Housel 8ca4a87c9a Add Quartz64 support 
This adds support for the Pine64 Quartz64 and other devices based on
the Rockchip RK3566. The platform support is adapted from the
Rockpro64 code, except that the RK356x has A55 cores, and adjusting
for the fact that the ARM Generic Timer is the only on-chip timer
available.

Signed-off-by: Peter S. Housel <housel@acm.org>
2022-11-21 16:43:20 +11:00

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/*
* Copyright Linux Kernel Team
*
* SPDX-License-Identifier: GPL-2.0-only
*
* This file is derived from an intermediate build stage of the
* Linux kernel. The licenses of all input files to this process
* are compatible with GPL-2.0-only.
*/
/dts-v1/;
/ {
interrupt-parent = <0x01>;
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "pine64,quartz64-a\0rockchip,rk3566";
model = "Pine64 RK3566 Quartz64-A Board";
aliases {
gpio0 = "/pinctrl/gpio@fdd60000";
gpio1 = "/pinctrl/gpio@fe740000";
gpio2 = "/pinctrl/gpio@fe750000";
gpio3 = "/pinctrl/gpio@fe760000";
gpio4 = "/pinctrl/gpio@fe770000";
i2c0 = "/i2c@fdd40000";
i2c1 = "/i2c@fe5a0000";
i2c2 = "/i2c@fe5b0000";
i2c3 = "/i2c@fe5c0000";
i2c4 = "/i2c@fe5d0000";
i2c5 = "/i2c@fe5e0000";
serial0 = "/serial@fdd50000";
serial1 = "/serial@fe650000";
serial2 = "/serial@fe660000";
serial3 = "/serial@fe670000";
serial4 = "/serial@fe680000";
serial5 = "/serial@fe690000";
serial6 = "/serial@fe6a0000";
serial7 = "/serial@fe6b0000";
serial8 = "/serial@fe6c0000";
serial9 = "/serial@fe6d0000";
ethernet0 = "/ethernet@fe010000";
mmc0 = "/mmc@fe2b0000";
mmc1 = "/mmc@fe310000";
};
memory {
device_type = "memory";
reg = < 0x00 0x00200000 0x00 0xefdfffff >;
};
cpus {
#address-cells = <0x02>;
#size-cells = <0x00>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x00>;
clocks = <0x02 0x00>;
#cooling-cells = <0x02>;
enable-method = "psci";
operating-points-v2 = <0x03>;
cpu-supply = <0x04>;
phandle = <0x06>;
};
cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x100>;
#cooling-cells = <0x02>;
enable-method = "psci";
operating-points-v2 = <0x03>;
cpu-supply = <0x04>;
phandle = <0x07>;
};
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x200>;
#cooling-cells = <0x02>;
enable-method = "psci";
operating-points-v2 = <0x03>;
cpu-supply = <0x04>;
phandle = <0x08>;
};
cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x300>;
#cooling-cells = <0x02>;
enable-method = "psci";
operating-points-v2 = <0x03>;
cpu-supply = <0x04>;
phandle = <0x09>;
};
};
opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
phandle = <0x03>;
opp-408000000 {
opp-hz = <0x00 0x18519600>;
opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
clock-latency-ns = <0x9c40>;
};
opp-600000000 {
opp-hz = <0x00 0x23c34600>;
opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
};
opp-816000000 {
opp-hz = <0x00 0x30a32c00>;
opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
opp-suspend;
};
opp-1104000000 {
opp-hz = <0x00 0x41cdb400>;
opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
};
opp-1416000000 {
opp-hz = <0x00 0x54667200>;
opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
};
opp-1608000000 {
opp-hz = <0x00 0x5fd82200>;
opp-microvolt = <0xee098 0xee098 0x118c30>;
};
opp-1800000000 {
opp-hz = <0x00 0x6b49d200>;
opp-microvolt = <0x100590 0x100590 0x118c30>;
};
};
gpu-opp-table {
compatible = "operating-points-v2";
phandle = <0x40>;
opp-200000000 {
opp-hz = <0x00 0xbebc200>;
opp-microvolt = <0xc96a8>;
};
opp-300000000 {
opp-hz = <0x00 0x11e1a300>;
opp-microvolt = <0xc96a8>;
};
opp-400000000 {
opp-hz = <0x00 0x17d78400>;
opp-microvolt = <0xc96a8>;
};
opp-600000000 {
opp-hz = <0x00 0x23c34600>;
opp-microvolt = <0xc96a8>;
};
opp-700000000 {
opp-hz = <0x00 0x29b92700>;
opp-microvolt = <0xdbba0>;
};
opp-800000000 {
opp-hz = <0x00 0x2faf0800>;
opp-microvolt = <0xf4240>;
};
};
firmware {
scmi {
compatible = "arm,scmi-smc";
arm,smc-id = <0x82000010>;
shmem = <0x05>;
#address-cells = <0x01>;
#size-cells = <0x00>;
protocol@14 {
reg = <0x14>;
#clock-cells = <0x01>;
phandle = <0x02>;
};
};
};
pmu {
compatible = "arm,cortex-a55-pmu";
interrupts = <0x00 0xe4 0x04 0x00 0xe5 0x04 0x00 0xe6 0x04 0x00 0xe7 0x04>;
interrupt-affinity = <0x06 0x07 0x08 0x09>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>;
arm,no-tick-in-suspend;
};
xin24m {
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-output-names = "xin24m";
#clock-cells = <0x00>;
};
xin32k {
compatible = "fixed-clock";
clock-frequency = <0x8000>;
clock-output-names = "xin32k";
pinctrl-0 = <0x0a>;
pinctrl-names = "default";
#clock-cells = <0x00>;
};
sram@10f000 {
compatible = "mmio-sram";
reg = <0x00 0x10f000 0x00 0x100>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x10f000 0x100>;
sram@0 {
compatible = "arm,scmi-shmem";
reg = <0x00 0x100>;
phandle = <0x05>;
};
};
sata@fc400000 {
compatible = "snps,dwc-ahci";
reg = <0x00 0xfc400000 0x00 0x1000>;
clocks = <0x0b 0x9b 0x0b 0x9c 0x0b 0x9d>;
clock-names = "sata\0pmalive\0rxoob";
interrupts = <0x00 0x5f 0x04>;
interrupt-names = "hostc";
phys = <0x0c 0x01>;
phy-names = "sata-phy";
ports-implemented = <0x01>;
power-domains = <0x0d 0x0f>;
status = "okay";
};
sata@fc800000 {
compatible = "snps,dwc-ahci";
reg = <0x00 0xfc800000 0x00 0x1000>;
clocks = <0x0b 0xa0 0x0b 0xa1 0x0b 0xa2>;
clock-names = "sata\0pmalive\0rxoob";
interrupts = <0x00 0x60 0x04>;
interrupt-names = "hostc";
phys = <0x0e 0x01>;
phy-names = "sata-phy";
ports-implemented = <0x01>;
power-domains = <0x0d 0x0f>;
status = "disabled";
};
usbdrd {
compatible = "rockchip,rk3399-dwc3\0snps,dwc3";
clocks = <0x0b 0xa6 0x0b 0xa7 0x0b 0xa5 0x0b 0x7f>;
clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
status = "okay";
dwc3@fcc00000 {
compatible = "snps,dwc3";
reg = <0x00 0xfcc00000 0x00 0x400000>;
interrupts = <0x00 0xa9 0x04>;
dr_mode = "host";
phys = <0x0f>;
phy-names = "usb2-phy";
phy_type = "utmi_wide";
power-domains = <0x0d 0x0f>;
resets = <0x0b 0x94>;
reset-names = "usb3-otg";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
snps,xhci-trb-ent-quirk;
status = "okay";
extcon = <0x10>;
maximum-speed = "high-speed";
snps,dis_u2_susphy_quirk;
};
};
usbhost {
compatible = "rockchip,rk3399-dwc3\0snps,dwc3";
clocks = <0x0b 0xa9 0x0b 0xaa 0x0b 0xa8 0x0b 0x7f>;
clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk";
#address-cells = <0x02>;
#size-cells = <0x02>;
assigned-clocks = <0x0b 0x22>;
assigned-clock-rates = <0x17d7840>;
ranges;
status = "disabled";
dwc3@fd000000 {
compatible = "snps,dwc3";
reg = <0x00 0xfd000000 0x00 0x400000>;
interrupts = <0x00 0xaa 0x04>;
dr_mode = "host";
phys = <0x11 0x0c 0x04>;
phy-names = "usb2-phy\0usb3-phy";
phy_type = "utmi_wide";
power-domains = <0x0d 0x0f>;
resets = <0x0b 0x95>;
reset-names = "usb3-host";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
status = "disabled";
};
};
interrupt-controller@fd400000 {
compatible = "arm,gic-v3";
reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0x80000>;
interrupts = <0x01 0x09 0x04>;
interrupt-controller;
#interrupt-cells = <0x03>;
mbi-alias = <0x00 0xfd410000>;
mbi-ranges = <0x128 0x18>;
msi-controller;
phandle = <0x01>;
};
usb@fd800000 {
compatible = "generic-ehci";
reg = <0x00 0xfd800000 0x00 0x40000>;
interrupts = <0x00 0x82 0x04>;
clocks = <0x0b 0xbd 0x0b 0xbe 0x0b 0xbc>;
phys = <0x12>;
phy-names = "usb2-phy";
status = "okay";
};
usb@fd840000 {
compatible = "generic-ohci";
reg = <0x00 0xfd840000 0x00 0x40000>;
interrupts = <0x00 0x83 0x04>;
clocks = <0x0b 0xbd 0x0b 0xbe 0x0b 0xbc>;
phys = <0x12>;
phy-names = "usb2-phy";
status = "okay";
};
usb@fd880000 {
compatible = "generic-ehci";
reg = <0x00 0xfd880000 0x00 0x40000>;
interrupts = <0x00 0x85 0x04>;
clocks = <0x0b 0xbf 0x0b 0xc0 0x0b 0xbc>;
phys = <0x13>;
phy-names = "usb2-phy";
status = "okay";
};
usb@fd8c0000 {
compatible = "generic-ohci";
reg = <0x00 0xfd8c0000 0x00 0x40000>;
interrupts = <0x00 0x86 0x04>;
clocks = <0x0b 0xbf 0x0b 0xc0 0x0b 0xbc>;
phys = <0x13>;
phy-names = "usb2-phy";
status = "okay";
};
syscon@fdc20000 {
compatible = "rockchip,rk3568-pmugrf\0syscon\0simple-mfd";
reg = <0x00 0xfdc20000 0x00 0x10000>;
phandle = <0x9c>;
io-domains {
compatible = "rockchip,rk3568-pmu-io-voltage-domain";
status = "okay";
pmuio1-supply = <0x14>;
pmuio2-supply = <0x14>;
vccio1-supply = <0x15>;
vccio2-supply = <0x16>;
vccio3-supply = <0x17>;
vccio4-supply = <0x16>;
vccio5-supply = <0x18>;
vccio6-supply = <0x19>;
vccio7-supply = <0x18>;
};
};
syscon@fdc50000 {
reg = <0x00 0xfdc50000 0x00 0x1000>;
compatible = "rockchip,rk3566-pipegrf\0syscon";
phandle = <0x95>;
};
syscon@fdc60000 {
compatible = "rockchip,rk3568-grf\0syscon\0simple-mfd";
reg = <0x00 0xfdc60000 0x00 0x10000>;
phandle = <0x1b>;
};
syscon@fdc70000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc70000 0x00 0x1000>;
};
syscon@fdc80000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc80000 0x00 0x1000>;
phandle = <0x96>;
};
syscon@fdc90000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc90000 0x00 0x1000>;
phandle = <0x97>;
};
syscon@fdca0000 {
compatible = "rockchip,rk3568-usb2phy-grf\0syscon";
reg = <0x00 0xfdca0000 0x00 0x8000>;
phandle = <0x98>;
};
syscon@fdca8000 {
compatible = "rockchip,rk3568-usb2phy-grf\0syscon";
reg = <0x00 0xfdca8000 0x00 0x8000>;
phandle = <0x9b>;
};
clock-controller@fdd00000 {
compatible = "rockchip,rk3568-pmucru";
reg = <0x00 0xfdd00000 0x00 0x1000>;
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x1a>;
};
clock-controller@fdd20000 {
compatible = "rockchip,rk3568-cru";
reg = <0x00 0xfdd20000 0x00 0x1000>;
#clock-cells = <0x01>;
#reset-cells = <0x01>;
assigned-clocks = <0x0b 0x04 0x1a 0x01>;
assigned-clock-rates = <0x47868c00 0xbebc200>;
rockchip,grf = <0x1b>;
phandle = <0x0b>;
};
i2c@fdd40000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfdd40000 0x00 0x1000>;
interrupts = <0x00 0x2e 0x04>;
clocks = <0x1a 0x07 0x1a 0x2d>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x1c>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "okay";
regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <0x01>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = "\0\f5";
regulator-max-microvolt = <0x118c30>;
regulator-ramp-delay = <0x8fc>;
regulator-always-on;
regulator-boot-on;
vin-supply = <0x1d>;
phandle = <0x04>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
pmic@20 {
compatible = "rockchip,rk817";
reg = <0x20>;
interrupt-parent = <0x1e>;
interrupts = <0x03 0x08>;
assigned-clocks = <0x0b 0x48>;
assigned-clock-parents = <0x0b 0x196>;
clock-names = "mclk";
clocks = <0x0b 0x48>;
clock-output-names = "rk808-clkout1\0rk808-clkout2";
#clock-cells = <0x01>;
pinctrl-names = "default";
pinctrl-0 = <0x1f 0x20>;
rockchip,system-power-controller;
#sound-dai-cells = <0x00>;
wakeup-source;
vcc1-supply = <0x1d>;
vcc2-supply = <0x1d>;
vcc3-supply = <0x1d>;
vcc4-supply = <0x1d>;
vcc5-supply = <0x1d>;
vcc6-supply = <0x1d>;
vcc7-supply = <0x1d>;
vcc8-supply = <0x1d>;
vcc9-supply = <0x21>;
phandle = <0x75>;
regulators {
DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x7a120>;
regulator-max-microvolt = <0x149970>;
regulator-init-microvolt = <0xdbba0>;
regulator-ramp-delay = <0x1771>;
regulator-initial-mode = <0x02>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0xdbba0>;
};
};
DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x7a120>;
regulator-max-microvolt = <0x149970>;
regulator-init-microvolt = <0xdbba0>;
regulator-ramp-delay = <0x1771>;
regulator-initial-mode = <0x02>;
regulator-name = "vdd_gpu";
phandle = <0x41>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x10c8e0>;
regulator-max-microvolt = <0x10c8e0>;
regulator-initial-mode = <0x02>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
regulator-initial-mode = <0x02>;
regulator-name = "vcc_3v3";
phandle = <0x18>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcca1v8_pmu";
phandle = <0x7a>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x1b7740>;
};
};
LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0xdbba0>;
regulator-max-microvolt = <0xdbba0>;
regulator-name = "vdda_0v9";
phandle = <0x55>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0xdbba0>;
regulator-max-microvolt = <0xdbba0>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0xdbba0>;
};
};
LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
regulator-name = "vccio_acodec";
phandle = <0x15>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x325aa0>;
regulator-name = "vccio_sd";
phandle = <0x17>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
regulator-name = "vcc3v3_pmu";
phandle = <0x14>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <0x325aa0>;
};
};
LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcc_1v8";
phandle = <0x16>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
regulator-name = "vcc1v8_dvp";
phandle = <0x19>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x2ab980>;
regulator-max-microvolt = <0x2ab980>;
regulator-name = "vcc2v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
BOOST {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
regulator-name = "boost";
phandle = <0x21>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
OTG_SWITCH {
regulator-name = "otg_switch";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
battery {
monitored-battery = <0x22>;
rockchip,resistor-sense-micro-ohms = <0x2710>;
rockchip,sleep-enter-current-microamp = <0x493e0>;
rockchip,sleep-filter-current-microamp = <0x186a0>;
};
};
};
serial@fdd50000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfdd50000 0x00 0x100>;
interrupts = <0x00 0x74 0x04>;
clocks = <0x1a 0x0b 0x1a 0x2c>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x00 0x23 0x01>;
dma-names = "tx\0rx";
pinctrl-0 = <0x24>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "okay";
};
pwm@fdd70000 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfdd70000 0x00 0x10>;
clocks = <0x1a 0x0d 0x1a 0x30>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x25>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fdd70010 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfdd70010 0x00 0x10>;
clocks = <0x1a 0x0d 0x1a 0x30>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x26>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fdd70020 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfdd70020 0x00 0x10>;
clocks = <0x1a 0x0d 0x1a 0x30>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x27>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fdd70030 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfdd70030 0x00 0x10>;
clocks = <0x1a 0x0d 0x1a 0x30>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x28>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
power-management@fdd90000 {
compatible = "rockchip,rk3568-pmu\0syscon\0simple-mfd";
reg = <0x00 0xfdd90000 0x00 0x1000>;
power-controller {
compatible = "rockchip,rk3568-power-controller";
#power-domain-cells = <0x01>;
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x0d>;
power-domain@7 {
reg = <0x07>;
clocks = <0x0b 0x19 0x0b 0x1a>;
pm_qos = <0x29>;
#power-domain-cells = <0x00>;
};
power-domain@8 {
reg = <0x08>;
clocks = <0x0b 0xcc 0x0b 0xcd>;
pm_qos = <0x2a 0x2b 0x2c>;
#power-domain-cells = <0x00>;
};
power-domain@9 {
reg = <0x09>;
clocks = <0x0b 0xda 0x0b 0xdb 0x0b 0xdc>;
pm_qos = <0x2d 0x2e 0x2f>;
#power-domain-cells = <0x00>;
};
power-domain@10 {
reg = <0x0a>;
clocks = <0x0b 0xf1 0x0b 0xf2>;
pm_qos = <0x30 0x31 0x32 0x33 0x34 0x35>;
#power-domain-cells = <0x00>;
};
power-domain@11 {
reg = <0x0b>;
clocks = <0x0b 0xed>;
pm_qos = <0x36>;
#power-domain-cells = <0x00>;
};
power-domain@13 {
clocks = <0x0b 0x107>;
reg = <0x0d>;
pm_qos = <0x37>;
#power-domain-cells = <0x00>;
};
power-domain@14 {
reg = <0x0e>;
clocks = <0x0b 0x102>;
pm_qos = <0x38 0x39 0x3a>;
#power-domain-cells = <0x00>;
};
power-domain@15 {
reg = <0x0f>;
clocks = <0x0b 0x7f>;
pm_qos = <0x3b 0x3c 0x3d 0x3e 0x3f>;
#power-domain-cells = <0x00>;
};
};
};
gpu@fde60000 {
compatible = "rockchip,rk3568-mali\0arm,mali-bifrost";
reg = <0x00 0xfde60000 0x00 0x4000>;
interrupts = <0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x27 0x04>;
interrupt-names = "job\0mmu\0gpu";
clocks = <0x02 0x01 0x0b 0x1b>;
clock-names = "core\0bus";
operating-points-v2 = <0x40>;
#cooling-cells = <0x02>;
power-domains = <0x0d 0x07>;
status = "okay";
mali-supply = <0x41>;
};
mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
reg = <0x00 0xfe000000 0x00 0x4000>;
interrupts = <0x00 0x64 0x04>;
clocks = <0x0b 0xc1 0x0b 0xc2 0x0b 0x18e 0x0b 0x18f>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
fifo-depth = <0x100>;
max-frequency = <0x8f0d180>;
resets = <0x0b 0xeb>;
reset-names = "reset";
status = "disabled";
};
ethernet@fe010000 {
compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a";
reg = <0x00 0xfe010000 0x00 0x10000>;
interrupts = <0x00 0x20 0x04 0x00 0x1d 0x04>;
interrupt-names = "macirq\0eth_wake_irq";
clocks = <0x0b 0x186 0x0b 0x189 0x0b 0x189 0x0b 0xc7 0x0b 0xc3 0x0b 0xc4 0x0b 0x189 0x0b 0xc8>;
clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref";
resets = <0x0b 0xec>;
reset-names = "stmmaceth";
rockchip,grf = <0x1b>;
snps,axi-config = <0x42>;
snps,mixed-burst;
snps,mtl-rx-config = <0x43>;
snps,mtl-tx-config = <0x44>;
snps,tso;
status = "okay";
assigned-clocks = <0x0b 0x189 0x0b 0x187 0x0b 0x186>;
assigned-clock-parents = <0x0b 0x187 0x0b 0x186 0x45>;
clock_in_out = "input";
phy-supply = <0x18>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <0x46 0x47 0x48 0x49 0x4a 0x4b>;
snps,reset-gpio = <0x1e 0x13 0x01>;
snps,reset-active-low;
snps,reset-delays-us = <0x00 0x4e20 0x186a0>;
tx_delay = <0x30>;
rx_delay = <0x10>;
phy-handle = <0x4c>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <0x01>;
#size-cells = <0x00>;
ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x00>;
phandle = <0x4c>;
};
};
stmmac-axi-config {
snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>;
snps,rd_osr_lmt = <0x08>;
snps,wr_osr_lmt = <0x04>;
phandle = <0x42>;
};
rx-queues-config {
snps,rx-queues-to-use = <0x01>;
phandle = <0x43>;
queue0 {
};
};
tx-queues-config {
snps,tx-queues-to-use = <0x01>;
phandle = <0x44>;
queue0 {
};
};
};
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <0x4d>;
};
vop@fe040000 {
compatible = "rockchip,rk3568-vop";
reg = <0x00 0xfe040000 0x00 0x3000 0x00 0xfe044000 0x00 0x1000>;
reg-names = "regs\0gamma_lut";
rockchip,grf = <0x1b>;
interrupts = <0x00 0x94 0x04>;
clocks = <0x0b 0xdd 0x0b 0xde 0x0b 0xdf 0x0b 0xe0 0x0b 0xe1>;
clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2";
iommus = <0x4e>;
power-domains = <0x0d 0x09>;
status = "okay";
assigned-clocks = <0x0b 0xdf 0x0b 0xe0>;
assigned-clock-parents = <0x1a 0x02 0x0b 0x05>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x4d>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@0 {
reg = <0x00>;
remote-endpoint = <0x4f>;
status = "okay";
phandle = <0x56>;
};
};
port@1 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x01>;
endpoint@0 {
reg = <0x00>;
remote-endpoint = <0x50>;
status = "disabled";
phandle = <0x57>;
};
};
port@2 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x02>;
endpoint@0 {
reg = <0x00>;
remote-endpoint = <0x51>;
status = "disabled";
phandle = <0x58>;
};
};
};
};
iommu@fe043e00 {
compatible = "rockchip,rk3568-iommu";
reg = <0x00 0xfe043e00 0x00 0x100 0x00 0xfe043f00 0x00 0x100>;
interrupts = <0x00 0x94 0x04>;
interrupt-names = "vop_mmu";
clocks = <0x0b 0xdd 0x0b 0xde>;
clock-names = "aclk\0iface";
#iommu-cells = <0x00>;
status = "okay";
phandle = <0x4e>;
};
hdmi@fe0a0000 {
compatible = "rockchip,rk3568-dw-hdmi";
reg = <0x00 0xfe0a0000 0x00 0x20000>;
interrupts = <0x00 0x2d 0x04>;
clocks = <0x0b 0xe6 0x0b 0xe7 0x0b 0x193 0x0b 0xde>;
clock-names = "iahb\0isfr\0cec\0hclk";
power-domains = <0x0d 0x09>;
reg-io-width = <0x04>;
rockchip,grf = <0x1b>;
#sound-dai-cells = <0x00>;
pinctrl-names = "default";
pinctrl-0 = <0x52 0x53 0x54>;
status = "okay";
avdd-0v9-supply = <0x55>;
avdd-1v8-supply = <0x16>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
#address-cells = <0x01>;
#size-cells = <0x00>;
endpoint@0 {
reg = <0x00>;
remote-endpoint = <0x56>;
status = "okay";
phandle = <0x4f>;
};
endpoint@1 {
reg = <0x01>;
remote-endpoint = <0x57>;
status = "disabled";
phandle = <0x50>;
};
endpoint@2 {
reg = <0x02>;
remote-endpoint = <0x58>;
status = "disabled";
phandle = <0x51>;
};
};
};
};
qos@fe128000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe128000 0x00 0x20>;
phandle = <0x29>;
};
qos@fe138080 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe138080 0x00 0x20>;
phandle = <0x38>;
};
qos@fe138100 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe138100 0x00 0x20>;
phandle = <0x39>;
};
qos@fe138180 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe138180 0x00 0x20>;
phandle = <0x3a>;
};
qos@fe148000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe148000 0x00 0x20>;
phandle = <0x2a>;
};
qos@fe148080 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe148080 0x00 0x20>;
phandle = <0x2b>;
};
qos@fe148100 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe148100 0x00 0x20>;
phandle = <0x2c>;
};
qos@fe150000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe150000 0x00 0x20>;
phandle = <0x36>;
};
qos@fe158000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158000 0x00 0x20>;
phandle = <0x30>;
};
qos@fe158100 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158100 0x00 0x20>;
phandle = <0x31>;
};
qos@fe158180 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158180 0x00 0x20>;
phandle = <0x32>;
};
qos@fe158200 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158200 0x00 0x20>;
phandle = <0x33>;
};
qos@fe158280 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158280 0x00 0x20>;
phandle = <0x34>;
};
qos@fe158300 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe158300 0x00 0x20>;
phandle = <0x35>;
};
qos@fe180000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe180000 0x00 0x20>;
};
qos@fe190000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe190000 0x00 0x20>;
phandle = <0x3b>;
};
qos@fe190280 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe190280 0x00 0x20>;
phandle = <0x3c>;
};
qos@fe190300 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe190300 0x00 0x20>;
phandle = <0x3d>;
};
qos@fe190380 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe190380 0x00 0x20>;
phandle = <0x3e>;
};
qos@fe190400 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe190400 0x00 0x20>;
phandle = <0x3f>;
};
qos@fe198000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe198000 0x00 0x20>;
phandle = <0x37>;
};
qos@fe1a8000 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe1a8000 0x00 0x20>;
phandle = <0x2d>;
};
qos@fe1a8080 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe1a8080 0x00 0x20>;
phandle = <0x2e>;
};
qos@fe1a8100 {
compatible = "rockchip,rk3568-qos\0syscon";
reg = <0x00 0xfe1a8100 0x00 0x20>;
phandle = <0x2f>;
};
pcie@fe260000 {
compatible = "rockchip,rk3568-pcie";
#address-cells = <0x03>;
#size-cells = <0x02>;
bus-range = <0x00 0x0f>;
assigned-clocks = <0x0b 0x81 0x0b 0x82 0x0b 0x83 0x0b 0x84 0x0b 0x85>;
clocks = <0x0b 0x81 0x0b 0x82 0x0b 0x83 0x0b 0x84 0x0b 0x85>;
clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux";
device_type = "pci";
interrupts = <0x00 0x4b 0x04 0x00 0x4a 0x04 0x00 0x49 0x04 0x00 0x48 0x04 0x00 0x47 0x04>;
interrupt-names = "sys\0pmc\0msi\0legacy\0err";
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x59 0x00 0x00 0x00 0x00 0x02 0x59 0x01 0x00 0x00 0x00 0x03 0x59 0x02 0x00 0x00 0x00 0x04 0x59 0x03>;
linux,pci-domain = <0x00>;
num-ib-windows = <0x06>;
num-ob-windows = <0x02>;
max-link-speed = <0x02>;
msi-map = <0x00 0x01 0x00 0x1000>;
num-lanes = <0x01>;
phys = <0x0e 0x02>;
phy-names = "pcie-phy";
power-domains = <0x0d 0x0f>;
reg = <0x03 0xc0000000 0x00 0x400000 0x00 0xfe260000 0x00 0x10000 0x03 0x3f800000 0x00 0x800000>;
ranges = <0x1000000 0x00 0x7f700000 0x03 0x3f700000 0x00 0x100000 0x2000000 0x00 0x40000000 0x03 0x00 0x00 0x3f700000>;
reg-names = "dbi\0apb\0config";
resets = <0x0b 0xa1>;
reset-names = "pipe";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x5a>;
reset-gpios = <0x5b 0x0a 0x00>;
vpcie3v3-supply = <0x5c>;
legacy-interrupt-controller {
#address-cells = <0x00>;
#interrupt-cells = <0x01>;
interrupt-controller;
interrupt-parent = <0x01>;
interrupts = <0x00 0x48 0x01>;
phandle = <0x59>;
};
};
mmc@fe2b0000 {
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
reg = <0x00 0xfe2b0000 0x00 0x4000>;
interrupts = <0x00 0x62 0x04>;
clocks = <0x0b 0xb0 0x0b 0xb1 0x0b 0x18a 0x0b 0x18b>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
fifo-depth = <0x100>;
max-frequency = <0x8f0d180>;
resets = <0x0b 0xd4>;
reset-names = "reset";
status = "okay";
bus-width = <0x04>;
cap-sd-highspeed;
cd-gpios = <0x1e 0x04 0x01>;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <0x5d 0x5e 0x5f 0x60>;
sd-uhs-sdr104;
vmmc-supply = <0x61>;
vqmmc-supply = <0x17>;
};
mmc@fe2c0000 {
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
reg = <0x00 0xfe2c0000 0x00 0x4000>;
interrupts = <0x00 0x63 0x04>;
clocks = <0x0b 0xb2 0x0b 0xb3 0x0b 0x18c 0x0b 0x18d>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
fifo-depth = <0x100>;
max-frequency = <0x8f0d180>;
resets = <0x0b 0xd6>;
reset-names = "reset";
status = "okay";
bus-width = <0x04>;
cap-sd-highspeed;
cap-sdio-irq;
disable-wp;
keep-power-in-suspend;
mmc-pwrseq = <0x62>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <0x63 0x64 0x65>;
sd-uhs-sdr104;
vmmc-supply = <0x66>;
vqmmc-supply = <0x16>;
};
spi@fe300000 {
compatible = "rockchip,sfc";
reg = <0x00 0xfe300000 0x00 0x4000>;
interrupts = <0x00 0x65 0x04>;
clocks = <0x0b 0x78 0x0b 0x76>;
clock-names = "clk_sfc\0hclk_sfc";
pinctrl-0 = <0x67>;
pinctrl-names = "default";
status = "disabled";
#address-cells = <0x01>;
#size-cells = <0x00>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x00>;
spi-max-frequency = <0x66ff300>;
spi-rx-bus-width = <0x04>;
spi-tx-bus-width = <0x01>;
};
};
mmc@fe310000 {
compatible = "rockchip,rk3568-dwcmshc";
reg = <0x00 0xfe310000 0x00 0x10000>;
interrupts = <0x00 0x13 0x04>;
assigned-clocks = <0x0b 0x7b 0x0b 0x7d>;
assigned-clock-rates = <0xbebc200 0x16e3600>;
clocks = <0x0b 0x7c 0x0b 0x7a 0x0b 0x79 0x0b 0x7b 0x0b 0x7d>;
clock-names = "core\0bus\0axi\0block\0timer";
status = "okay";
bus-width = <0x08>;
mmc-hs200-1_8v;
non-removable;
vmmc-supply = <0x18>;
vqmmc-supply = <0x16>;
};
spdif@fe460000 {
compatible = "rockchip,rk3568-spdif";
reg = <0x00 0xfe460000 0x00 0x1000>;
interrupts = <0x00 0x66 0x04>;
clock-names = "mclk\0hclk";
clocks = <0x0b 0x5f 0x0b 0x5c>;
dmas = <0x68 0x01>;
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <0x69>;
#sound-dai-cells = <0x00>;
status = "okay";
phandle = <0xab>;
};
i2s@fe410000 {
compatible = "rockchip,rk3568-i2s-tdm";
reg = <0x00 0xfe410000 0x00 0x1000>;
interrupts = <0x00 0x35 0x04>;
assigned-clocks = <0x0b 0x45 0x0b 0x49>;
assigned-clock-rates = <0x46cf7100 0x46cf7100>;
clocks = <0x0b 0x47 0x0b 0x4b 0x0b 0x3a>;
clock-names = "mclk_tx\0mclk_rx\0hclk";
dmas = <0x68 0x03 0x68 0x02>;
dma-names = "rx\0tx";
resets = <0x0b 0x52 0x0b 0x53>;
reset-names = "tx-m\0rx-m";
rockchip,grf = <0x1b>;
pinctrl-names = "default";
pinctrl-0 = <0x6a 0x6b 0x6c 0x6d>;
#sound-dai-cells = <0x00>;
status = "okay";
rockchip,trcm-sync-tx-only;
phandle = <0xaa>;
};
dmac@fe530000 {
compatible = "arm,pl330\0arm,primecell";
reg = <0x00 0xfe530000 0x00 0x4000>;
interrupts = <0x00 0x0e 0x04 0x00 0x0d 0x04>;
arm,pl330-periph-burst;
clocks = <0x0b 0x10d>;
clock-names = "apb_pclk";
#dma-cells = <0x01>;
phandle = <0x23>;
};
dmac@fe550000 {
compatible = "arm,pl330\0arm,primecell";
reg = <0x00 0xfe550000 0x00 0x4000>;
interrupts = <0x00 0x10 0x04 0x00 0x0f 0x04>;
arm,pl330-periph-burst;
clocks = <0x0b 0x10d>;
clock-names = "apb_pclk";
#dma-cells = <0x01>;
phandle = <0x68>;
};
i2c@fe5a0000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfe5a0000 0x00 0x1000>;
interrupts = <0x00 0x2f 0x04>;
clocks = <0x0b 0x148 0x0b 0x147>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x6e>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};
i2c@fe5b0000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfe5b0000 0x00 0x1000>;
interrupts = <0x00 0x30 0x04>;
clocks = <0x0b 0x14a 0x0b 0x149>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x6f>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};
i2c@fe5c0000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfe5c0000 0x00 0x1000>;
interrupts = <0x00 0x31 0x04>;
clocks = <0x0b 0x14c 0x0b 0x14b>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x70>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};
i2c@fe5d0000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfe5d0000 0x00 0x1000>;
interrupts = <0x00 0x32 0x04>;
clocks = <0x0b 0x14e 0x0b 0x14d>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x71>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};
i2c@fe5e0000 {
compatible = "rockchip,rk3568-i2c\0rockchip,rk3399-i2c";
reg = <0x00 0xfe5e0000 0x00 0x1000>;
interrupts = <0x00 0x33 0x04>;
clocks = <0x0b 0x150 0x0b 0x14f>;
clock-names = "i2c\0pclk";
pinctrl-0 = <0x72>;
pinctrl-names = "default";
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};
watchdog@fe600000 {
compatible = "rockchip,rk3568-wdt\0snps,dw-wdt";
reg = <0x00 0xfe600000 0x00 0x100>;
interrupts = <0x00 0x95 0x04>;
clocks = <0x0b 0x116 0x0b 0x115>;
clock-names = "tclk\0pclk";
};
serial@fe650000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe650000 0x00 0x100>;
interrupts = <0x00 0x75 0x04>;
clocks = <0x0b 0x11f 0x0b 0x11c>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x02 0x23 0x03>;
dma-names = "tx\0rx";
pinctrl-0 = <0x73 0x74>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "okay";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <0x75 0x01>;
clock-names = "lpo";
device-wake-gpios = <0x76 0x11 0x00>;
host-wake-gpios = <0x76 0x10 0x00>;
shutdown-gpios = <0x76 0x0f 0x00>;
pinctrl-names = "default";
pinctrl-0 = <0x77 0x78 0x79>;
vbat-supply = <0x1d>;
vddio-supply = <0x7a>;
};
};
serial@fe660000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe660000 0x00 0x100>;
interrupts = <0x00 0x76 0x04>;
clocks = <0x0b 0x123 0x0b 0x120>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x04 0x23 0x05>;
dma-names = "tx\0rx";
pinctrl-0 = <0x7b>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "okay";
};
serial@fe670000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe670000 0x00 0x100>;
interrupts = <0x00 0x77 0x04>;
clocks = <0x0b 0x127 0x0b 0x124>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x06 0x23 0x07>;
dma-names = "tx\0rx";
pinctrl-0 = <0x7c>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe680000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe680000 0x00 0x100>;
interrupts = <0x00 0x78 0x04>;
clocks = <0x0b 0x12b 0x0b 0x128>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x08 0x23 0x09>;
dma-names = "tx\0rx";
pinctrl-0 = <0x7d>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe690000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe690000 0x00 0x100>;
interrupts = <0x00 0x79 0x04>;
clocks = <0x0b 0x12f 0x0b 0x12c>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x0a 0x23 0x0b>;
dma-names = "tx\0rx";
pinctrl-0 = <0x7e>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe6a0000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe6a0000 0x00 0x100>;
interrupts = <0x00 0x7a 0x04>;
clocks = <0x0b 0x133 0x0b 0x130>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x0c 0x23 0x0d>;
dma-names = "tx\0rx";
pinctrl-0 = <0x7f>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe6b0000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe6b0000 0x00 0x100>;
interrupts = <0x00 0x7b 0x04>;
clocks = <0x0b 0x137 0x0b 0x134>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x0e 0x23 0x0f>;
dma-names = "tx\0rx";
pinctrl-0 = <0x80>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe6c0000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe6c0000 0x00 0x100>;
interrupts = <0x00 0x7c 0x04>;
clocks = <0x0b 0x13b 0x0b 0x138>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x10 0x23 0x11>;
dma-names = "tx\0rx";
pinctrl-0 = <0x81>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
serial@fe6d0000 {
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
reg = <0x00 0xfe6d0000 0x00 0x100>;
interrupts = <0x00 0x7d 0x04>;
clocks = <0x0b 0x13f 0x0b 0x13c>;
clock-names = "baudclk\0apb_pclk";
dmas = <0x23 0x12 0x23 0x13>;
dma-names = "tx\0rx";
pinctrl-0 = <0x82>;
pinctrl-names = "default";
reg-io-width = <0x04>;
reg-shift = <0x02>;
status = "disabled";
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <0x64>;
polling-delay = <0x3e8>;
thermal-sensors = <0x83 0x00>;
trips {
cpu_alert0 {
temperature = <0x11170>;
hysteresis = <0x7d0>;
type = "passive";
phandle = <0x84>;
};
cpu_alert1 {
temperature = <0x124f8>;
hysteresis = <0x7d0>;
type = "passive";
};
cpu_crit {
temperature = <0x17318>;
hysteresis = <0x7d0>;
type = "critical";
};
cpu_hot {
temperature = <0xd6d8>;
hysteresis = <0x7d0>;
type = "active";
phandle = <0x85>;
};
};
cooling-maps {
map0 {
trip = <0x84>;
cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
};
map1 {
trip = <0x85>;
cooling-device = <0x86 0xffffffff 0xffffffff>;
};
};
};
gpu-thermal {
polling-delay-passive = <0x14>;
polling-delay = <0x3e8>;
thermal-sensors = <0x83 0x01>;
};
};
tsadc@fe710000 {
compatible = "rockchip,rk3568-tsadc";
reg = <0x00 0xfe710000 0x00 0x100>;
interrupts = <0x00 0x73 0x04>;
assigned-clocks = <0x0b 0x110 0x0b 0x111>;
assigned-clock-rates = <0x1036640 0xaae60>;
clocks = <0x0b 0x111 0x0b 0x10f>;
clock-names = "tsadc\0apb_pclk";
resets = <0x0b 0x181 0x0b 0x182 0x0b 0x1d7>;
rockchip,grf = <0x1b>;
rockchip,hw-tshut-temp = <0x17318>;
pinctrl-names = "init\0default\0sleep";
pinctrl-0 = <0x87>;
pinctrl-1 = <0x88>;
pinctrl-2 = <0x87>;
#thermal-sensor-cells = <0x01>;
status = "okay";
rockchip,hw-tshut-mode = <0x01>;
rockchip,hw-tshut-polarity = <0x00>;
phandle = <0x83>;
};
saradc@fe720000 {
compatible = "rockchip,rk3568-saradc\0rockchip,rk3399-saradc";
reg = <0x00 0xfe720000 0x00 0x100>;
interrupts = <0x00 0x5d 0x04>;
clocks = <0x0b 0x113 0x0b 0x112>;
clock-names = "saradc\0apb_pclk";
resets = <0x0b 0x180>;
reset-names = "saradc-apb";
#io-channel-cells = <0x01>;
status = "disabled";
};
pwm@fe6e0000 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6e0000 0x00 0x10>;
clocks = <0x0b 0x15a 0x0b 0x159>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x89>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6e0010 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6e0010 0x00 0x10>;
clocks = <0x0b 0x15a 0x0b 0x159>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8a>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6e0020 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6e0020 0x00 0x10>;
clocks = <0x0b 0x15a 0x0b 0x159>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8b>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6e0030 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6e0030 0x00 0x10>;
clocks = <0x0b 0x15a 0x0b 0x159>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8c>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6f0000 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6f0000 0x00 0x10>;
clocks = <0x0b 0x15d 0x0b 0x15c>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8d>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6f0010 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6f0010 0x00 0x10>;
clocks = <0x0b 0x15d 0x0b 0x15c>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8e>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6f0020 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6f0020 0x00 0x10>;
clocks = <0x0b 0x15d 0x0b 0x15c>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x8f>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe6f0030 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe6f0030 0x00 0x10>;
clocks = <0x0b 0x15d 0x0b 0x15c>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x90>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe700000 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe700000 0x00 0x10>;
clocks = <0x0b 0x160 0x0b 0x15f>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x91>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe700010 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe700010 0x00 0x10>;
clocks = <0x0b 0x160 0x0b 0x15f>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x92>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe700020 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe700020 0x00 0x10>;
clocks = <0x0b 0x160 0x0b 0x15f>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x93>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
pwm@fe700030 {
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
reg = <0x00 0xfe700030 0x00 0x10>;
clocks = <0x0b 0x160 0x0b 0x15f>;
clock-names = "pwm\0pclk";
pinctrl-0 = <0x94>;
pinctrl-names = "active";
#pwm-cells = <0x03>;
status = "disabled";
};
phy@fe830000 {
compatible = "rockchip,rk3568-naneng-combphy";
reg = <0x00 0xfe830000 0x00 0x100>;
#phy-cells = <0x01>;
assigned-clocks = <0x1a 0x22>;
assigned-clock-rates = <0x5f5e100>;
clocks = <0x1a 0x22 0x0b 0x17d 0x0b 0x7f>;
clock-names = "ref\0apb\0pipe";
resets = <0x0b 0x1c6 0x0b 0x1c7>;
reset-names = "combphy-apb\0combphy";
rockchip,pipe-grf = <0x95>;
rockchip,pipe-phy-grf = <0x96>;
status = "okay";
rockchip,enable-ssc;
phandle = <0x0c>;
};
phy@fe840000 {
compatible = "rockchip,rk3568-naneng-combphy";
reg = <0x00 0xfe840000 0x00 0x100>;
#phy-cells = <0x01>;
assigned-clocks = <0x1a 0x25>;
assigned-clock-rates = <0x5f5e100>;
clocks = <0x1a 0x25 0x0b 0x17e 0x0b 0x7f>;
clock-names = "ref\0apb\0pipe";
resets = <0x0b 0x1c8 0x0b 0x1c9>;
reset-names = "combphy-apb\0combphy";
rockchip,pipe-grf = <0x95>;
rockchip,pipe-phy-grf = <0x97>;
status = "okay";
phandle = <0x0e>;
};
usb2-phy@fe8a0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x00 0xfe8a0000 0x00 0x10000>;
clocks = <0x1a 0x13>;
clock-names = "phyclk";
#clock-cells = <0x00>;
clock-output-names = "usb480m_phy";
interrupts = <0x00 0x87 0x04>;
rockchip,usbgrf = <0x98>;
status = "okay";
phandle = <0x10>;
host-port {
#phy-cells = <0x00>;
status = "okay";
phy-supply = <0x99>;
phandle = <0x11>;
};
otg-port {
#phy-cells = <0x00>;
status = "okay";
phy-supply = <0x9a>;
phandle = <0x0f>;
};
};
usb2-phy@fe8b0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x00 0xfe8b0000 0x00 0x10000>;
clocks = <0x1a 0x15>;
clock-names = "phyclk";
#clock-cells = <0x00>;
interrupts = <0x00 0x88 0x04>;
rockchip,usbgrf = <0x9b>;
status = "okay";
host-port {
#phy-cells = <0x00>;
status = "okay";
phy-supply = <0x99>;
phandle = <0x13>;
};
otg-port {
#phy-cells = <0x00>;
status = "okay";
phy-supply = <0x99>;
phandle = <0x12>;
};
};
pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <0x1b>;
rockchip,pmu = <0x9c>;
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
gpio@fdd60000 {
compatible = "rockchip,gpio-bank";
reg = <0x00 0xfdd60000 0x00 0x100>;
interrupts = <0x00 0x21 0x04>;
clocks = <0x1a 0x2e 0x1a 0x0c>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
phandle = <0x1e>;
};
gpio@fe740000 {
compatible = "rockchip,gpio-bank";
reg = <0x00 0xfe740000 0x00 0x100>;
interrupts = <0x00 0x22 0x04>;
clocks = <0x0b 0x163 0x0b 0x164>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
phandle = <0x5b>;
};
gpio@fe750000 {
compatible = "rockchip,gpio-bank";
reg = <0x00 0xfe750000 0x00 0x100>;
interrupts = <0x00 0x23 0x04>;
clocks = <0x0b 0x165 0x0b 0x166>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
phandle = <0x76>;
};
gpio@fe760000 {
compatible = "rockchip,gpio-bank";
reg = <0x00 0xfe760000 0x00 0x100>;
interrupts = <0x00 0x24 0x04>;
clocks = <0x0b 0x167 0x0b 0x168>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
};
gpio@fe770000 {
compatible = "rockchip,gpio-bank";
reg = <0x00 0xfe770000 0x00 0x100>;
interrupts = <0x00 0x25 0x04>;
clocks = <0x0b 0x169 0x0b 0x16a>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
phandle = <0xaf>;
};
pcfg-pull-up {
bias-pull-up;
phandle = <0x9f>;
};
pcfg-pull-down {
bias-pull-down;
phandle = <0xa5>;
};
pcfg-pull-none {
bias-disable;
phandle = <0x9d>;
};
pcfg-pull-none-drv-level-1 {
bias-disable;
drive-strength = <0x01>;
phandle = <0xa1>;
};
pcfg-pull-none-drv-level-2 {
bias-disable;
drive-strength = <0x02>;
phandle = <0xa0>;
};
pcfg-pull-none-drv-level-3 {
bias-disable;
drive-strength = <0x03>;
phandle = <0xa4>;
};
pcfg-pull-up-drv-level-1 {
bias-pull-up;
drive-strength = <0x01>;
phandle = <0xa3>;
};
pcfg-pull-up-drv-level-2 {
bias-pull-up;
drive-strength = <0x02>;
phandle = <0x9e>;
};
pcfg-pull-none-smt {
bias-disable;
input-schmitt-enable;
phandle = <0xa2>;
};
acodec {
};
audiopwm {
};
bt656 {
};
bt1120 {
};
cam {
};
can0 {
};
can1 {
};
can2 {
};
cif {
};
clk32k {
clk32k-out0 {
rockchip,pins = <0x00 0x08 0x02 0x9d>;
phandle = <0x0a>;
};
};
cpu {
};
ebc {
};
edpdp {
};
emmc {
};
eth0 {
};
eth1 {
};
flash {
};
fspi {
fspi-pins {
rockchip,pins = <0x01 0x18 0x01 0x9d 0x01 0x1b 0x01 0x9d 0x01 0x19 0x01 0x9d 0x01 0x1a 0x01 0x9d 0x01 0x17 0x02 0x9d 0x01 0x1c 0x01 0x9d>;
phandle = <0x67>;
};
};
gmac0 {
};
gmac1 {
gmac1m0-miim {
rockchip,pins = <0x03 0x14 0x03 0x9d 0x03 0x15 0x03 0x9d>;
phandle = <0x46>;
};
gmac1m0-clkinout {
rockchip,pins = <0x03 0x10 0x03 0x9d>;
phandle = <0x4a>;
};
gmac1m0-rx-bus2 {
rockchip,pins = <0x03 0x09 0x03 0x9d 0x03 0x0a 0x03 0x9d 0x03 0x0b 0x03 0x9d>;
phandle = <0x48>;
};
gmac1m0-tx-bus2 {
rockchip,pins = <0x03 0x0d 0x03 0xa0 0x03 0x0e 0x03 0xa0 0x03 0x0f 0x03 0x9d>;
phandle = <0x47>;
};
gmac1m0-rgmii-clk {
rockchip,pins = <0x03 0x07 0x03 0x9d 0x03 0x06 0x03 0xa1>;
phandle = <0x49>;
};
gmac1m0-rgmii-bus {
rockchip,pins = <0x03 0x04 0x03 0x9d 0x03 0x05 0x03 0x9d 0x03 0x02 0x03 0xa0 0x03 0x03 0x03 0xa0>;
phandle = <0x4b>;
};
};
gpu {
};
hdmitx {
hdmitxm0-cec {
rockchip,pins = <0x04 0x19 0x01 0x9d>;
phandle = <0x54>;
};
hdmitx-scl {
rockchip,pins = <0x04 0x17 0x01 0x9d>;
phandle = <0x52>;
};
hdmitx-sda {
rockchip,pins = <0x04 0x18 0x01 0x9d>;
phandle = <0x53>;
};
};
i2c0 {
i2c0-xfer {
rockchip,pins = <0x00 0x09 0x01 0xa2 0x00 0x0a 0x01 0xa2>;
phandle = <0x1c>;
};
};
i2c1 {
i2c1-xfer {
rockchip,pins = <0x00 0x0b 0x01 0xa2 0x00 0x0c 0x01 0xa2>;
phandle = <0x6e>;
};
};
i2c2 {
i2c2m0-xfer {
rockchip,pins = <0x00 0x0d 0x01 0xa2 0x00 0x0e 0x01 0xa2>;
phandle = <0x6f>;
};
};
i2c3 {
i2c3m0-xfer {
rockchip,pins = <0x01 0x01 0x01 0xa2 0x01 0x00 0x01 0xa2>;
phandle = <0x70>;
};
};
i2c4 {
i2c4m0-xfer {
rockchip,pins = <0x04 0x0b 0x01 0xa2 0x04 0x0a 0x01 0xa2>;
phandle = <0x71>;
};
};
i2c5 {
i2c5m0-xfer {
rockchip,pins = <0x03 0x0b 0x04 0xa2 0x03 0x0c 0x04 0xa2>;
phandle = <0x72>;
};
};
i2s1 {
i2s1m0-lrcktx {
rockchip,pins = <0x01 0x05 0x01 0x9d>;
phandle = <0x6b>;
};
i2s1m0-mclk {
rockchip,pins = <0x01 0x02 0x01 0x9d>;
phandle = <0x20>;
};
i2s1m0-sclktx {
rockchip,pins = <0x01 0x03 0x01 0x9d>;
phandle = <0x6a>;
};
i2s1m0-sdi0 {
rockchip,pins = <0x01 0x0b 0x01 0x9d>;
phandle = <0x6c>;
};
i2s1m0-sdo0 {
rockchip,pins = <0x01 0x07 0x01 0x9d>;
phandle = <0x6d>;
};
};
i2s2 {
};
i2s3 {
};
isp {
};
jtag {
};
lcdc {
};
mcu {
};
npu {
};
pcie20 {
};
pcie30x1 {
};
pcie30x2 {
};
pdm {
};
pmic {
pmic-int-l {
rockchip,pins = <0x00 0x03 0x00 0x9f>;
phandle = <0x1f>;
};
hp-det-h {
rockchip,pins = <0x00 0x14 0x00 0x9d>;
phandle = <0xa9>;
};
};
pmu {
};
pwm0 {
pwm0m0-pins {
rockchip,pins = <0x00 0x0f 0x01 0x9d>;
phandle = <0x25>;
};
};
pwm1 {
pwm1m0-pins {
rockchip,pins = <0x00 0x10 0x01 0x9d>;
phandle = <0x26>;
};
};
pwm2 {
pwm2m0-pins {
rockchip,pins = <0x00 0x11 0x01 0x9d>;
phandle = <0x27>;
};
};
pwm3 {
pwm3-pins {
rockchip,pins = <0x00 0x12 0x01 0x9d>;
phandle = <0x28>;
};
};
pwm4 {
pwm4-pins {
rockchip,pins = <0x00 0x13 0x01 0x9d>;
phandle = <0x89>;
};
};
pwm5 {
pwm5-pins {
rockchip,pins = <0x00 0x14 0x01 0x9d>;
phandle = <0x8a>;
};
};
pwm6 {
pwm6-pins {
rockchip,pins = <0x00 0x15 0x01 0x9d>;
phandle = <0x8b>;
};
};
pwm7 {
pwm7-pins {
rockchip,pins = <0x00 0x16 0x01 0x9d>;
phandle = <0x8c>;
};
};
pwm8 {
pwm8m0-pins {
rockchip,pins = <0x03 0x09 0x05 0x9d>;
phandle = <0x8d>;
};
};
pwm9 {
pwm9m0-pins {
rockchip,pins = <0x03 0x0a 0x05 0x9d>;
phandle = <0x8e>;
};
};
pwm10 {
pwm10m0-pins {
rockchip,pins = <0x03 0x0d 0x05 0x9d>;
phandle = <0x8f>;
};
};
pwm11 {
pwm11m0-pins {
rockchip,pins = <0x03 0x0e 0x05 0x9d>;
phandle = <0x90>;
};
};
pwm12 {
pwm12m0-pins {
rockchip,pins = <0x03 0x0f 0x02 0x9d>;
phandle = <0x91>;
};
};
pwm13 {
pwm13m0-pins {
rockchip,pins = <0x03 0x10 0x02 0x9d>;
phandle = <0x92>;
};
};
pwm14 {
pwm14m0-pins {
rockchip,pins = <0x03 0x14 0x01 0x9d>;
phandle = <0x93>;
};
};
pwm15 {
pwm15m0-pins {
rockchip,pins = <0x03 0x15 0x01 0x9d>;
phandle = <0x94>;
};
};
refclk {
};
sata {
};
sata0 {
};
sata1 {
};
sata2 {
};
scr {
};
sdmmc0 {
sdmmc0-bus4 {
rockchip,pins = <0x01 0x1d 0x01 0x9e 0x01 0x1e 0x01 0x9e 0x01 0x1f 0x01 0x9e 0x02 0x00 0x01 0x9e>;
phandle = <0x5d>;
};
sdmmc0-clk {
rockchip,pins = <0x02 0x02 0x01 0x9e>;
phandle = <0x5e>;
};
sdmmc0-cmd {
rockchip,pins = <0x02 0x01 0x01 0x9e>;
phandle = <0x5f>;
};
sdmmc0-det {
rockchip,pins = <0x00 0x04 0x01 0x9f>;
phandle = <0x60>;
};
};
sdmmc1 {
sdmmc1-bus4 {
rockchip,pins = <0x02 0x03 0x01 0x9e 0x02 0x04 0x01 0x9e 0x02 0x05 0x01 0x9e 0x02 0x06 0x01 0x9e>;
phandle = <0x63>;
};
sdmmc1-clk {
rockchip,pins = <0x02 0x08 0x01 0x9e>;
phandle = <0x65>;
};
sdmmc1-cmd {
rockchip,pins = <0x02 0x07 0x01 0x9e>;
phandle = <0x64>;
};
};
sdmmc2 {
};
spdif {
spdifm0-tx {
rockchip,pins = <0x01 0x04 0x04 0x9d>;
phandle = <0x69>;
};
};
spi0 {
};
spi1 {
};
spi2 {
};
spi3 {
};
tsadc {
tsadc-shutorg {
rockchip,pins = <0x00 0x01 0x02 0x9d>;
phandle = <0x88>;
};
tsadc-pin {
rockchip,pins = <0x00 0x01 0x00 0x9d>;
phandle = <0x87>;
};
};
uart0 {
uart0-xfer {
rockchip,pins = <0x00 0x10 0x03 0x9f 0x00 0x11 0x03 0x9f>;
phandle = <0x24>;
};
};
uart1 {
uart1m0-xfer {
rockchip,pins = <0x02 0x0b 0x02 0x9f 0x02 0x0c 0x02 0x9f>;
phandle = <0x73>;
};
uart1m0-ctsn {
rockchip,pins = <0x02 0x0e 0x02 0x9d>;
phandle = <0x74>;
};
};
uart2 {
uart2m0-xfer {
rockchip,pins = <0x00 0x18 0x01 0x9f 0x00 0x19 0x01 0x9f>;
phandle = <0x7b>;
};
};
uart3 {
uart3m0-xfer {
rockchip,pins = <0x01 0x00 0x02 0x9f 0x01 0x01 0x02 0x9f>;
phandle = <0x7c>;
};
};
uart4 {
uart4m0-xfer {
rockchip,pins = <0x01 0x04 0x02 0x9f 0x01 0x06 0x02 0x9f>;
phandle = <0x7d>;
};
};
uart5 {
uart5m0-xfer {
rockchip,pins = <0x02 0x01 0x03 0x9f 0x02 0x02 0x03 0x9f>;
phandle = <0x7e>;
};
};
uart6 {
uart6m0-xfer {
rockchip,pins = <0x02 0x03 0x03 0x9f 0x02 0x04 0x03 0x9f>;
phandle = <0x7f>;
};
};
uart7 {
uart7m0-xfer {
rockchip,pins = <0x02 0x05 0x03 0x9f 0x02 0x06 0x03 0x9f>;
phandle = <0x80>;
};
};
uart8 {
uart8m0-xfer {
rockchip,pins = <0x02 0x16 0x02 0x9f 0x02 0x15 0x03 0x9f>;
phandle = <0x81>;
};
};
uart9 {
uart9m0-xfer {
rockchip,pins = <0x02 0x07 0x03 0x9f 0x02 0x08 0x03 0x9f>;
phandle = <0x82>;
};
};
vop {
};
spi0-hs {
};
spi1-hs {
};
spi2-hs {
};
spi3-hs {
};
gmac-txd-level3 {
};
gmac-txc-level2 {
};
bt {
bt-enable-h {
rockchip,pins = <0x02 0x0f 0x00 0x9d>;
phandle = <0x79>;
};
bt-host-wake-l {
rockchip,pins = <0x02 0x10 0x00 0xa5>;
phandle = <0x77>;
};
bt-wake-l {
rockchip,pins = <0x02 0x11 0x00 0x9d>;
phandle = <0x78>;
};
};
fan {
fan-en-h {
rockchip,pins = <0x00 0x1d 0x00 0x9d>;
phandle = <0xa6>;
};
};
leds {
work-led-enable-h {
rockchip,pins = <0x00 0x1b 0x00 0x9d>;
phandle = <0xa7>;
};
diy-led-enable-h {
rockchip,pins = <0x00 0x1c 0x00 0x9d>;
phandle = <0xa8>;
};
};
pcie {
pcie-enable-h {
rockchip,pins = <0x00 0x16 0x00 0x9d>;
phandle = <0xb2>;
};
pcie-reset-h {
rockchip,pins = <0x01 0x0a 0x00 0x9d>;
phandle = <0x5a>;
};
};
sdio-pwrseq {
wifi-enable-h {
rockchip,pins = <0x02 0x12 0x00 0x9d>;
phandle = <0xad>;
};
};
usb2 {
vcc5v0-usb20-host-en_h {
rockchip,pins = <0x04 0x0d 0x00 0x9d>;
phandle = <0xb0>;
};
};
vcc_sd {
vcc-sd-h {
rockchip,pins = <0x00 0x05 0x00 0x9d>;
phandle = <0xb3>;
};
};
};
chosen {
stdout-path = "serial2:1500000n8";
};
battery-cell {
compatible = "simple-battery";
charge-full-design-microamp-hours = <0x2625a0>;
charge-term-current-microamp = <0x493e0>;
constant-charge-current-max-microamp = <0x1e8480>;
constant-charge-voltage-max-microvolt = <0x401640>;
factory-internal-resistance-micro-ohms = <0x2bf20>;
voltage-max-design-microvolt = <0x3ea710>;
voltage-min-design-microvolt = <0x375028>;
ocv-capacity-celsius = <0x14>;
ocv-capacity-table-0 = <0x3ea710 0x64 0x3e1e58 0x5f 0x3d4f50 0x5a 0x3ca758 0x55 0x3c3610 0x50 0x3ba1a0 0x4b 0x3b2888 0x46 0x3acac8 0x41 0x3a8090 0x3c 0x3a3a40 0x37 0x3a0390 0x32 0x39cce0 0x2d 0x399630 0x28 0x395f80 0x23 0x3930a0 0x1e 0x38fdd8 0x19 0x38bb70 0x14 0x386968 0x0f 0x383a88 0x0a 0x375028 0x00>;
phandle = <0x22>;
};
external-gmac1-clock {
compatible = "fixed-clock";
clock-frequency = <0x7735940>;
clock-output-names = "gmac1_clkin";
#clock-cells = <0x00>;
phandle = <0x45>;
};
gpio_fan {
compatible = "gpio-fan";
gpios = <0x1e 0x1d 0x00>;
gpio-fan,speed-map = <0x00 0x00 0x1194 0x01>;
pinctrl-names = "default";
pinctrl-0 = <0xa6>;
#cooling-cells = <0x02>;
phandle = <0x86>;
};
leds {
compatible = "gpio-leds";
led-work {
label = "work-led";
default-state = "off";
gpios = <0x1e 0x1b 0x00>;
pinctrl-names = "default";
pinctrl-0 = <0xa7>;
retain-state-suspended;
};
led-diy {
label = "diy-led";
default-state = "on";
gpios = <0x1e 0x1c 0x00>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <0xa8>;
retain-state-suspended;
};
};
rk817-sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <0xa9>;
simple-audio-card,format = "i2s";
simple-audio-card,hp-det-gpio = <0x1e 0x14 0x00>;
simple-audio-card,name = "Analog RK817";
simple-audio-card,mclk-fs = <0x100>;
simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphones\0Speaker\0Speaker";
simple-audio-card,routing = "MICL\0Mic Jack\0Headphones\0HPOL\0Headphones\0HPOR\0Speaker\0SPKO";
simple-audio-card,cpu {
sound-dai = <0xaa>;
};
simple-audio-card,codec {
sound-dai = <0x75>;
};
};
spdif-dit {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0x00>;
phandle = <0xac>;
};
spdif-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "SPDIF";
simple-audio-card,cpu {
sound-dai = <0xab>;
};
simple-audio-card,codec {
sound-dai = <0xac>;
};
};
sdio-pwrseq {
status = "okay";
compatible = "mmc-pwrseq-simple";
clocks = <0x75 0x01>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <0xad>;
reset-gpios = <0x76 0x12 0x01>;
post-power-on-delay-ms = <0x64>;
power-off-delay-us = <0x4c4b40>;
phandle = <0x62>;
};
vcc12v_dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0xb71b00>;
regulator-max-microvolt = <0xb71b00>;
phandle = <0xae>;
};
vbus {
compatible = "regulator-fixed";
regulator-name = "vbus";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
vin-supply = <0xae>;
phandle = <0xb4>;
};
vcc5v0_usb {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
vin-supply = <0xae>;
phandle = <0xb1>;
};
vcc5v0_usb20_host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb20_host";
enable-active-high;
gpio = <0xaf 0x0d 0x00>;
pinctrl-names = "default";
pinctrl-0 = <0xb0>;
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
vin-supply = <0xb1>;
phandle = <0x99>;
};
vcc5v0_usb20_otg {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb20_otg";
enable-active-high;
gpio = <0xaf 0x0d 0x00>;
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
vin-supply = <0x21>;
phandle = <0x9a>;
};
vcc3v3_pcie_p {
compatible = "regulator-fixed";
enable-active-high;
gpio = <0x1e 0x16 0x00>;
pinctrl-names = "default";
pinctrl-0 = <0xb2>;
regulator-name = "vcc3v3_pcie_p";
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
vin-supply = <0x18>;
phandle = <0x5c>;
};
vcc3v3_sd {
compatible = "regulator-fixed";
enable-active-low;
gpio = <0x1e 0x05 0x01>;
pinctrl-names = "default";
pinctrl-0 = <0xb3>;
regulator-boot-on;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
vin-supply = <0x18>;
phandle = <0x61>;
};
vcc_sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x432380>;
regulator-max-microvolt = <0x432380>;
vin-supply = <0xb4>;
phandle = <0x1d>;
};
vcc_wl {
compatible = "regulator-fixed";
regulator-name = "vcc_wl";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
vin-supply = <0x1d>;
phandle = <0x66>;
};
};
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