forked from Imagelibrary/seL4
python: use KernelSel4Arch instead of KernelArch
Drop optional parameter 'arch' and make 'sel4arch' a required parameter to avoid implicit assumptions. Signed-off-by: Axel Heider <axelheider@gmx.de>
This commit is contained in:
committed by
Gerwin Klein
parent
b9a8967954
commit
c036e6c676
@@ -184,8 +184,8 @@ if(DEFINED KernelDTSList AND (NOT "${KernelDTSList}" STREQUAL ""))
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${PYTHON3} "${HARDWARE_GEN_PATH}" --dtb "${KernelDTBPath}" --compat-strings
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--compat-strings-out "${compatibility_outfile}" --c-header --header-out
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"${device_dest}" --hardware-config "${config_file}" --hardware-schema
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"${config_schema}" --yaml --yaml-out "${platform_yaml}" --arch "${KernelArch}"
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--addrspace-max "${KernelPaddrUserTop}"
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"${config_schema}" --yaml --yaml-out "${platform_yaml}" --sel4arch
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"${KernelSel4Arch}" --addrspace-max "${KernelPaddrUserTop}"
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RESULT_VARIABLE error
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)
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if(error)
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@@ -11,7 +11,8 @@ class Config:
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''' Abstract config class '''
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arch = 'unknown'
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def __init__(self, addrspace_max):
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def __init__(self, sel4arch, addrspace_max):
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self.sel4arch = sel4arch
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self.addrspace_max = addrspace_max
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def get_kernel_phys_align(self) -> int:
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@@ -46,8 +47,8 @@ class Config:
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class ARMConfig(Config):
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''' Config class for ARM '''
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SUPERSECTION_BITS = 24
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arch = 'arm'
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SUPERSECTION_BITS = 24 # 2^24 = 16 MiByte
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def get_kernel_phys_align(self) -> int:
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''' on ARM the ELF loader expects to be able to map a supersection page to load the kernel. '''
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@@ -70,13 +71,17 @@ class ARMConfig(Config):
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class RISCVConfig(Config):
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''' Config class for RISCV '''
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MEGA_PAGE_SIZE = 0x200000
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arch = 'riscv'
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MEGAPAGE_BITS_RV32 = 22 # 2^22 = 4 MiByte
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MEGAPAGE_BITS_RV64 = 21 # 2^21 = 2 MiByte
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MEGA_PAGE_SIZE_RV64 = 2**MEGAPAGE_BITS_RV64
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def get_bootloader_reserve(self) -> int:
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''' on RISC-V OpenSBI is loaded at the start
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of physical memory. Mark it as unavailable. '''
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return self.MEGA_PAGE_SIZE
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''' OpenSBI reserved the first 2 MiByte of physical memory on rv64,
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which is exactly a megapage. For rv32 we use the same value for now, as
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this seems to work nicely - even if this is just half of the 4 MiByte
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magepages that exist there. '''
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return self.MEGA_PAGE_SIZE_RV64
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def align_memory(self, regions: Set[Region]) -> List[Region]:
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''' Currently the RISC-V port expects physBase to be the address that the
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@@ -95,18 +100,20 @@ class RISCVConfig(Config):
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def get_device_page_bits(self) -> int:
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''' Get page size in bits for mapping devices for this arch '''
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if self.addrspace_max > (1 << 32):
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# rv39 and rv48 use 2MiB device pages
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return 21
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else:
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# rv32 uses 4MiB device pages
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return 22
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if (self.sel4arch == 'riscv32'):
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# 4MiB device pages
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return self.MEGAPAGE_BITS_RV32
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elif (self.sel4arch == 'riscv64'):
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# 2MiB device pages for sv39 and sv48
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return self.MEGAPAGE_BITS_RV64
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raise ValueError('Unsupported sel4arch "{}" specified.'.format(self.sel4arch))
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def get_arch_config(arch: str, addrspace_max: int) -> Config:
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def get_arch_config(sel4arch: str, addrspace_max: int) -> Config:
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''' Return an appropriate Config object for the given architecture '''
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if arch == 'arm':
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return ARMConfig(addrspace_max)
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elif arch == 'riscv':
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return RISCVConfig(addrspace_max)
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raise ValueError('Unsupported arch specified.')
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if sel4arch in ['aarch32', 'aarch64', 'arm_hyp']:
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return ARMConfig(sel4arch, addrspace_max)
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elif sel4arch in ['riscv32', 'riscv64']:
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return RISCVConfig(sel4arch, addrspace_max)
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else:
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raise ValueError('Unsupported sel4arch "{}" specified.'.format(sel4arch))
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@@ -78,7 +78,7 @@ static const kernel_frame_t BOOT_RODATA kernel_device_frames[] = {
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/* contains {{ ', '.join(group.labels.keys()) }} */
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.pptr = KDEV_BASE + {{ "0x{:x}".format(map_addr) }},
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{% endif %}
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{% if args.arch == 'arm' %}
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{% if config.arch == 'arm' %}
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.armExecuteNever = true,
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{% endif %}
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.userAvailable = {{ str(group.user_ok).lower() }}
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@@ -176,7 +176,7 @@ def get_interrupts(tree: FdtParser, hw_yaml: HardwareYaml) -> List:
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return ret
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def create_c_header_file(args, kernel_irqs: List, kernel_macros: Dict,
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def create_c_header_file(config, kernel_irqs: List, kernel_macros: Dict,
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kernel_regions: List, physBase: int, physical_memory,
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outputStream):
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@@ -187,7 +187,7 @@ def create_c_header_file(args, kernel_irqs: List, kernel_macros: Dict,
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template_args = dict(
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builtins.__dict__,
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**{
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'args': args,
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'config': config,
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'kernel_irqs': kernel_irqs,
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'kernel_macros': kernel_macros,
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'kernel_regions': kernel_regions,
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@@ -207,7 +207,7 @@ def run(tree: FdtParser, hw_yaml: HardwareYaml, config: Config, args: argparse.N
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kernel_regions, kernel_macros = get_kernel_devices(tree, hw_yaml)
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create_c_header_file(
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args,
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config,
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get_interrupts(tree, hw_yaml),
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kernel_macros,
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kernel_regions,
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@@ -49,7 +49,7 @@ def add_task_args(outputs: dict, parser: argparse.ArgumentParser):
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def main(args: argparse.Namespace):
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''' Parse the DT and hardware config YAML and run each
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selected output method. '''
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cfg = hardware.config.get_arch_config(args.arch, args.addrspace_max)
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cfg = hardware.config.get_arch_config(args.sel4arch, args.addrspace_max)
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parsed_dt = FdtParser(args.dtb)
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rules = yaml.load(args.hardware_config, Loader=yaml.FullLoader)
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schema = yaml.load(args.hardware_schema, Loader=yaml.FullLoader)
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@@ -73,7 +73,8 @@ if __name__ == '__main__':
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required=True, type=argparse.FileType('r'))
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parser.add_argument('--hardware-schema', help='YAML file containing schema for hardware config',
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required=True, type=argparse.FileType('r'))
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parser.add_argument('--arch', help='architecture to generate for', default='arm')
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parser.add_argument('--sel4arch', help='seL4 architecture to generate for',
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required=True)
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parser.add_argument('--addrspace-max',
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help='maximum address that is available as device untyped', type=int, default=32)
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