forked from Imagelibrary/seL4
kzm: implement MCS timer driver
- use gpt, so we can have overflow and compare interrupts at the same time (epit only allows compare) - set the gpt to use the ipg_highfreq timer, as the standard ipg is too low and breaks the timer calculations
This commit is contained in:
Anna Lyons
72
include/drivers/timer/imx31-gpt.h
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72
include/drivers/timer/imx31-gpt.h
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@@ -0,0 +1,72 @@
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/*
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* Copyright 2019, Data61
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* Commonwealth Scientific and Industrial Research Organisation (CSIRO)
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* ABN 41 687 119 230.
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*
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* This software may be distributed and modified according to the terms of
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* the GNU General Public License version 2. Note that NO WARRANTY is provided.
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* See "LICENSE_GPLv2.txt" for details.
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*
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* @TAG(DATA61_GPL)
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*/
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#ifndef __DRIVERS_TIMER_IMX31_GPT_H
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#define __DRIVERS_TIMER_IMX31_GPT_H
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#include <config.h>
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#ifndef CONFIG_KERNEL_MCS
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#error "This driver should only be selected for MCS kernel"
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#endif /* CONFIG_KERNEL_MCS */
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/* gptir and gptsr bits */
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#define OF1IE 0 /* output compare 1 */
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#define ROV 5 /* roll over */
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/* Memory map for GPT (General Purpose Timer). */
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struct timer {
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uint32_t gptcr; /* control */
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uint32_t gptpr; /* prescaler */
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uint32_t gptsr; /* status register */
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uint32_t gptir; /* interrupt register */
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uint32_t gptcr1;
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uint32_t gptcr2;
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uint32_t gptcr3;
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uint32_t gpticr1;
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uint32_t gpticr2;
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uint32_t gptcnt;
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};
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typedef volatile struct timer timer_t;
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extern timer_t *gpt;
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extern ticks_t high_bits;
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static inline ticks_t getCurrentTime(void)
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{
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return ((high_bits + !!(gpt->gptsr & BIT(ROV))) << 32llu) + gpt->gptcnt;
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}
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static inline void setDeadline(ticks_t deadline)
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{
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if (((uint32_t) deadline) > gpt->gptcnt) {
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/* turn on compare irq */
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gpt->gptir |= BIT(OF1IE);
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/* set the deadline */
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do {
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gpt->gptcr1 = (uint32_t) deadline;
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} while (gpt->gptcr1 != (uint32_t) deadline);
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}
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}
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static inline void ackDeadlineIRQ(void)
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{
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if (gpt->gptsr & BIT(ROV)) {
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high_bits++;
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}
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/* turn off compare irq */
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gpt->gptir &= ~(BIT(OF1IE));
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/* ack either irq */
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gpt->gptsr |= (BIT(OF1IE) | BIT(ROV));
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}
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#endif /* !__DRIVERS_TIMER_IMX31_GPT_H */
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@@ -37,6 +37,7 @@ register_driver(
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PREFIX src/drivers/timer
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CFILES "imx31-epit.c"
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)
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register_driver(compatibility_strings "fsl,imx31-gpt" PREFIX src/drivers/timer CFILES "imx31-gpt.c")
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register_driver(
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compatibility_strings "ti,omap3430-timer"
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PREFIX src/drivers/timer
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53
src/drivers/timer/imx31-gpt.c
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53
src/drivers/timer/imx31-gpt.c
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@@ -0,0 +1,53 @@
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/*
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* Copyright 2019, Data61
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* Commonwealth Scientific and Industrial Research Organisation (CSIRO)
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* ABN 41 687 119 230.
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*
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* This software may be distributed and modified according to the terms of
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* the GNU General Public License version 2. Note that NO WARRANTY is provided.
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* See "LICENSE_GPLv2.txt" for details.
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*
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* @TAG(DATA61_GPL)
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*/
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#include <config.h>
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#include <types.h>
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#include <machine/io.h>
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#include <kernel/vspace.h>
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#include <arch/machine.h>
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#include <arch/kernel/vspace.h>
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#include <linker.h>
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/* gptcr bits */
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#define EN 0
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#define ENMOD 1
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#define FRR 9
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#define CLKSRC 6
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#define SWR 15
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timer_t *gpt = (timer_t *) TIMER_PPTR;
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ticks_t high_bits = 0;
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enum IPGConstants {
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IPG_CLK = 1,
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IPG_CLK_HIGHFREQ = 2,
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IPG_CLK_32K = 3
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};
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interrupt_t active_irq = irqInvalid;
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BOOT_CODE void initTimer(void)
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{
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/* reset the gpt */
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gpt->gptcr = 0;
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/* clear the status register */
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gpt->gptcr = 0x3F;
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/* software reset */
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gpt->gptcr = BIT(SWR);
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/* configure the gpt */
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gpt->gptcr = BIT(ENMOD) | BIT(FRR) | (IPG_CLK_HIGHFREQ << CLKSRC);
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/* enable overflow irq */
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gpt->gptir = BIT(ROV);
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/* turn it on */
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gpt->gptcr |= BIT(EN);
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}
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@@ -22,14 +22,24 @@ if(KernelPlatformKZM)
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set(KernelArmMach "imx" CACHE INTERNAL "")
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list(APPEND KernelDTSList "tools/dts/kzm.dts")
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list(APPEND KernelDTSList "src/plat/imx31/overlay-kzm.dts")
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if(KernelIsMCS)
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list(APPEND KernelDTSList "src/plat/imx31/mcs-overlay-kzm.dts")
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set(TimerFrequency 18600000llu) # 18.6MHz -- calculated by trial and error, roughly precise
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set(TimerDriver drivers/timer/imx31-gpt.h)
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else()
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set(TimerFrequency 32768llu)
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set(TimerDriver drivers/timer/imx31-epit.h)
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add_bf_source_old("KernelPlatformKZM" "imx31-epit.bf" "include" "drivers/timer")
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endif()
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declare_default_headers(
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TIMER_FREQUENCY 32768llu
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TIMER_FREQUENCY ${TimerFrequency}
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MAX_IRQ 63
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INTERRUPT_CONTROLLER drivers/irq/imx31.h
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TIMER drivers/timer/imx31-epit.h
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TIMER ${TimerDriver}
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KERNEL_WCET 10u
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CLK_SHIFT 47u
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CLK_MAGIC 7566531633llu
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)
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endif()
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add_sources(DEP "KernelPlatformKZM" CFILES src/plat/imx31/machine/hardware.c)
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add_bf_source_old("KernelPlatformKZM" "imx31-epit.bf" "include" "drivers/timer")
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21
src/plat/imx31/mcs-overlay-kzm.dts
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21
src/plat/imx31/mcs-overlay-kzm.dts
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@@ -0,0 +1,21 @@
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/*
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* Copyright 2019, Data61
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* Commonwealth Scientific and Industrial Research Organisation (CSIRO)
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* ABN 41 687 119 230.
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*
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* This software may be distributed and modified according to the terms of
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* the GNU General Public License version 2. Note that NO WARRANTY is provided.
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* See "LICENSE_GPLv2.txt" for details.
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*
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* @TAG(DATA61_GPL)
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*/
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/ {
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chosen {
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seL4,kernel-devices =
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"serial0",
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&{/interrupt-controller@68000000},
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&{/l2cc@30000000},
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&{/soc/aips@53f00000/timer@53f90000};
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};
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};
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@@ -176,6 +176,7 @@ devices:
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index: 0
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kernel: TIMER_PPTR
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interrupts:
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# IMX6 also has the imx31-gpt.
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KERNEL_TIMER_IRQ: 0
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# i.MX EPIT (no Linux binding, this is seL4-specific.)
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- compatible:
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@@ -186,6 +187,15 @@ devices:
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kernel: EPIT_PPTR
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interrupts:
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KERNEL_TIMER_IRQ: 0
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# i.MX GPT
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- compatible:
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- fsl,imx31-gpt
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regions:
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- executeNever: true
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index: 0
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kernel: TIMER_PPTR
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interrupts:
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KERNEL_TIMER_IRQ: 0
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# QCOM Krait timer (timer/qcom,msm-timer.txt)
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- compatible:
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- qcom,kpss-timer
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