forked from Imagelibrary/rtems
215 lines
7.3 KiB
C
215 lines
7.3 KiB
C
/**
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* @file
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*
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* @ingroup tms570
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*
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* @brief Definition of TMS570 selftest error codes, addresses and functions.
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*/
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/*
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* Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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* Algorithms are based on Ti manuals and Ti HalCoGen generated
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* code available under following copyright.
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*/
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/*
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* Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef LIBBSP_ARM_TMS570_SELFTEST_H
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#define LIBBSP_ARM_TMS570_SELFTEST_H
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#include <stdint.h>
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#include <stdbool.h>
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#define CCMSELFCHECK_FAIL1 1U
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#define CCMSELFCHECK_FAIL2 2U
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#define CCMSELFCHECK_FAIL3 3U
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#define CCMSELFCHECK_FAIL4 4U
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#define PBISTSELFCHECK_FAIL1 5U
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#define EFCCHECK_FAIL1 6U
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#define EFCCHECK_FAIL2 7U
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#define FMCECCCHECK_FAIL1 8U
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#define CHECKB0RAMECC_FAIL1 9U
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#define CHECKB1RAMECC_FAIL1 10U
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#define CHECKFLASHECC_FAIL1 11U
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#define VIMPARITYCHECK_FAIL1 12U
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#define DMAPARITYCHECK_FAIL1 13U
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#define HET1PARITYCHECK_FAIL1 14U
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#define HTU1PARITYCHECK_FAIL1 15U
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#define HET2PARITYCHECK_FAIL1 16U
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#define HTU2PARITYCHECK_FAIL1 17U
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#define ADC1PARITYCHECK_FAIL1 18U
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#define ADC2PARITYCHECK_FAIL1 19U
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#define CAN1PARITYCHECK_FAIL1 20U
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#define CAN2PARITYCHECK_FAIL1 21U
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#define CAN3PARITYCHECK_FAIL1 22U
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#define MIBSPI1PARITYCHECK_FAIL1 23U
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#define MIBSPI3PARITYCHECK_FAIL1 24U
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#define MIBSPI5PARITYCHECK_FAIL1 25U
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#define CHECKRAMECC_FAIL1 26U
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#define CHECKRAMECC_FAIL2 27U
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#define CHECKCLOCKMONITOR_FAIL1 28U
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#define CHECKFLASHEEPROMECC_FAIL1 29U
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#define CHECKFLASHEEPROMECC_FAIL2 31U
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#define CHECKFLASHEEPROMECC_FAIL3 32U
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#define CHECKFLASHEEPROMECC_FAIL4 33U
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#define CHECKPLL1SLIP_FAIL1 34U
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#define CHECKRAMADDRPARITY_FAIL1 35U
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#define CHECKRAMADDRPARITY_FAIL2 36U
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#define CHECKRAMUERRTEST_FAIL1 37U
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#define CHECKRAMUERRTEST_FAIL2 38U
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#define FMCBUS1PARITYCHECK_FAIL1 39U
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#define FMCBUS1PARITYCHECK_FAIL2 40U
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#define PBISTSELFCHECK_FAIL2 41U
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#define PBISTSELFCHECK_FAIL3 42U
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/* PBIST and STC ROM - PBIST RAM GROUPING */
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#define PBIST_ROM_PBIST_RAM_GROUP 1U
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#define STC_ROM_PBIST_RAM_GROUP 2U
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#define VIMRAMLOC (*(volatile uint32_t *)0xFFF82000U)
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#define VIMRAMPARLOC (*(volatile uint32_t *)0xFFF82400U)
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#define NHET1RAMPARLOC (*(volatile uint32_t *)0xFF462000U)
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#define NHET2RAMPARLOC (*(volatile uint32_t *)0xFF442000U)
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#define adcPARRAM1 (*(volatile uint32_t *)(0xFF3E0000U + 0x1000U))
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#define adcPARRAM2 (*(volatile uint32_t *)(0xFF3A0000U + 0x1000U))
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#define canPARRAM1 (*(volatile uint32_t *)(0xFF1E0000U + 0x10U))
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#define canPARRAM2 (*(volatile uint32_t *)(0xFF1C0000U + 0x10U))
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#define canPARRAM3 (*(volatile uint32_t *)(0xFF1A0000U + 0x10U))
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#define HTU1PARLOC (*(volatile uint32_t *)0xFF4E0200U)
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#define HTU2PARLOC (*(volatile uint32_t *)0xFF4C0200U)
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#define NHET1RAMLOC (*(volatile uint32_t *)0xFF460000U)
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#define NHET2RAMLOC (*(volatile uint32_t *)0xFF440000U)
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#define HTU1RAMLOC (*(volatile uint32_t *)0xFF4E0000U)
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#define HTU2RAMLOC (*(volatile uint32_t *)0xFF4C0000U)
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#define adcRAM1 (*(volatile uint32_t *)0xFF3E0000U)
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#define adcRAM2 (*(volatile uint32_t *)0xFF3A0000U)
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#define canRAM1 (*(volatile uint32_t *)0xFF1E0000U)
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#define canRAM2 (*(volatile uint32_t *)0xFF1C0000U)
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#define canRAM3 (*(volatile uint32_t *)0xFF1A0000U)
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#define DMARAMPARLOC (*(volatile uint32_t *)(0xFFF80A00U))
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#define DMARAMLOC (*(volatile uint32_t *)(0xFFF80000U))
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#define MIBSPI1RAMLOC (*(volatile uint32_t *)(0xFF0E0000U))
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#define MIBSPI3RAMLOC (*(volatile uint32_t *)(0xFF0C0000U))
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#define MIBSPI5RAMLOC (*(volatile uint32_t *)(0xFF0A0000U))
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#define mibspiPARRAM1 (*(volatile uint32_t *)(0xFF0E0000U + 0x00000400U))
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#define mibspiPARRAM3 (*(volatile uint32_t *)(0xFF0C0000U + 0x00000400U))
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#define mibspiPARRAM5 (*(volatile uint32_t *)(0xFF0A0000U + 0x00000400U))
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/** @enum pbistPort
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* @brief Alias names for pbist Port number
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*
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* This enumeration is used to provide alias names for the pbist Port number
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* - PBIST_PORT0
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* - PBIST_PORT1
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*
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* @Note Check the datasheet for the port avaiability
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*/
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enum pbistPort {
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PBIST_PORT0 = 0U, /**< Alias for PBIST Port 0 */
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PBIST_PORT1 = 1U /**< Alias for PBIST Port 1 < Check datasheet for Port 1 availability > */
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};
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enum {
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PBIST_TripleReadSlow = 0x00000001U, /**<TRIPLE_READ_SLOW_READ for PBIST and STC ROM*/
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PBIST_TripleReadFast = 0x00000002U, /**<TRIPLE_READ_SLOW_READ for PBIST and STC ROM*/
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PBIST_March13N_DP = 0x00000004U, /**< March13 N Algo for 2 Port mem */
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};
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uint32_t tms570_efc_check( void );
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bool tms570_efc_check_self_test( void );
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void bsp_selftest_fail_notification( uint32_t flag );
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void tms570_memory_port0_fail_notification(
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uint32_t groupSelect,
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uint32_t dataSelect,
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uint32_t address,
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uint32_t data
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);
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void tms570_esm_channel_sr_clear(
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unsigned grp,
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unsigned chan
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);
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int tms570_esm_channel_sr_get(
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unsigned grp,
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unsigned chan
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);
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void tms570_pbist_self_check( void );
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void tms570_pbist_run(
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uint32_t raminfoL,
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uint32_t algomask
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);
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bool tms570_pbist_is_test_completed( void );
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bool tms570_pbist_is_test_passed( void );
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void tms570_pbist_fail( void );
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void tms570_pbist_stop( void );
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void tms570_enable_parity( void );
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void tms570_disable_parity( void );
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bool tms570_efc_stuck_zero( void );
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void tms570_efc_self_test( void );
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bool tms570_pbist_port_test_status( uint32_t port );
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void tms570_check_tcram_ecc( void );
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#endif /*LIBBSP_ARM_TMS570_SELFTEST_H*/
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