forked from Imagelibrary/rtems
232 lines
8.0 KiB
C
232 lines
8.0 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsM68kMVME147s
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*
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* @brief Global BSP definitions.
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*/
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/* bsp.h
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*
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* This include file contains all MVME147 board IO definitions.
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* MVME147 port for TNI - Telecom Bretagne
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* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
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* May 1996
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*/
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#ifndef LIBBSP_M68K_MVME147S_BSP_H
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#define LIBBSP_M68K_MVME147S_BSP_H
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/**
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* @defgroup RTEMSBSPsM68kMVME147s MVME147s
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*
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* @ingroup RTEMSBSPsM68k
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*
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* @brief MVME147s Board Support Package.
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*
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* @{
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*/
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#include <bspopts.h>
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#include <bsp/default-initial-extension.h>
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#include <rtems.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Constants */
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#define RAM_START 0x00007000
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#define RAM_END 0x003e0000
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#define DRAM_END 0x00400000
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/* We leave 128k for the shared memory */
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/* MVME 147 Peripheral controller chip
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see MVME147/D1, 3.4 */
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struct pcc_map {
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/* 32 bit registers */
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uint32_t dma_table_address; /* 0xfffe1000 */
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uint32_t dma_data_address; /* 0xfffe1004 */
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uint32_t dma_bytecount; /* 0xfffe1008 */
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uint32_t dma_data_holding; /* 0xfffe100c */
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/* 16 bit registers */
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uint16_t timer1_preload; /* 0xfffe1010 */
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uint16_t timer1_count; /* 0xfffe1012 */
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uint16_t timer2_preload; /* 0xfffe1014 */
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uint16_t timer2_count; /* 0xfffe1016 */
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/* 8 bit registers */
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uint8_t timer1_int_control; /* 0xfffe1018 */
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uint8_t timer1_control; /* 0xfffe1019 */
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uint8_t timer2_int_control; /* 0xfffe101a */
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uint8_t timer2_control; /* 0xfffe101b */
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uint8_t acfail_int_control; /* 0xfffe101c */
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uint8_t watchdog_control; /* 0xfffe101d */
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uint8_t printer_int_control; /* 0xfffe101e */
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uint8_t printer_control; /* 0xfffe102f */
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uint8_t dma_int_control; /* 0xfffe1020 */
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uint8_t dma_control; /* 0xfffe1021 */
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uint8_t bus_error_int_control; /* 0xfffe1022 */
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uint8_t dma_status; /* 0xfffe1023 */
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uint8_t abort_int_control; /* 0xfffe1024 */
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uint8_t table_address_function_code; /* 0xfffe1025 */
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uint8_t serial_port_int_control; /* 0xfffe1026 */
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uint8_t general_purpose_control; /* 0xfffe1027 */
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uint8_t lan_int_control; /* 0xfffe1028 */
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uint8_t general_purpose_status; /* 0xfffe1029 */
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uint8_t scsi_port_int_control; /* 0xfffe102a */
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uint8_t slave_base_address; /* 0xfffe102b */
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uint8_t software_int_1_control; /* 0xfffe102c */
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uint8_t int_base_vector; /* 0xfffe102d */
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uint8_t software_int_2_control; /* 0xfffe102e */
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uint8_t revision_level; /* 0xfffe102f */
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};
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#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
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/* VME chip configuration registers */
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struct vme_lcsr_map {
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uint8_t unused_1;
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uint8_t system_controller; /* 0xfffe2001 */
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uint8_t unused_2;
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uint8_t vme_bus_requester; /* 0xfffe2003 */
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uint8_t unused_3;
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uint8_t master_configuration; /* 0xfffe2005 */
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uint8_t unused_4;
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uint8_t slave_configuration; /* 0xfffe2007 */
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uint8_t unused_5;
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uint8_t timer_configuration; /* 0xfffe2009 */
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uint8_t unused_6;
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uint8_t slave_address_modifier; /* 0xfffe200b */
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uint8_t unused_7;
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uint8_t master_address_modifier; /* 0xfffe200d */
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uint8_t unused_8;
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uint8_t interrupt_handler_mask; /* 0xfffe200f */
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uint8_t unused_9;
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uint8_t utility_interrupt_mask; /* 0xfffe2011 */
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uint8_t unused_10;
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uint8_t utility_interrupt_vector; /* 0xfffe2013 */
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uint8_t unused_11;
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uint8_t interrupt_request; /* 0xfffe2015 */
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uint8_t unused_12;
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uint8_t vme_bus_status_id; /* 0xfffe2017 */
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uint8_t unused_13;
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uint8_t bus_error_status; /* 0xfffe2019 */
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uint8_t unused_14;
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uint8_t gcsr_base_address; /* 0xfffe201b */
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};
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#define vme_lcsr ((volatile struct vme_lcsr_map * const) 0xfffe2000)
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struct vme_gcsr_map {
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uint8_t unused_1;
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uint8_t global_0; /* 0xfffe2021 */
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uint8_t unused_2;
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uint8_t global_1; /* 0xfffe2023 */
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uint8_t unused_3;
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uint8_t board_identification; /* 0xfffe2025 */
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uint8_t unused_4;
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uint8_t general_purpose_0; /* 0xfffe2027 */
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uint8_t unused_5;
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uint8_t general_purpose_1; /* 0xfffe2029 */
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uint8_t unused_6;
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uint8_t general_purpose_2; /* 0xfffe202b */
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uint8_t unused_7;
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uint8_t general_purpose_3; /* 0xfffe202d */
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uint8_t unused_8;
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uint8_t general_purpose_4; /* 0xfffe202f */
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};
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#define vme_gcsr ((volatile struct vme_gcsr_map * const) 0xfffe2020)
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#define z8530 0xfffe3001
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/* interrupt vectors - see MVME147/D1 4.14 */
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#define PCC_BASE_VECTOR 0x40 /* First user int */
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#define SCC_VECTOR PCC_BASE_VECTOR+3
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#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
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#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
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#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
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#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
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#define VME_BASE_VECTOR 0x50
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#define VME_SIGLP_VECTOR VME_BASE_VECTOR+1
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#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
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#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
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#if (USE_CHANNEL_A == 1)
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#define CONSOLE_CONTROL 0xfffe3002
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#define CONSOLE_DATA 0xfffe3003
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#elif (USE_CHANNEL_B == 1)
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#define CONSOLE_CONTROL 0xfffe3000
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#define CONSOLE_DATA 0xfffe3001
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#endif
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#define FOREVER 1 /* infinite loop */
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#ifdef M147_INIT
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#undef EXTERN
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#define EXTERN
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#else
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#undef EXTERN
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#define EXTERN extern
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#endif
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extern rtems_isr_entry M68Kvec[]; /* vector table address */
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/*
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* NOTE: Use the standard Clock driver entry
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*/
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/* functions */
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rtems_isr_entry set_vector(
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rtems_isr_entry handler,
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rtems_vector_number vector,
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int type
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);
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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#endif
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