forked from Imagelibrary/rtems
Add directives to get and set the priority of an interrupt vector. Implement the directives for the following BSP families: * arm/lpc24xx * arm/lpc32xx * powerpc/mpc55xxevb * powerpc/qoriq Implement the directives for the following interrupt controllers: * GICv2 and GICv3 (arm and aarch64) * NVIC (arm) * PLIC (riscv) Update #5002.
188 lines
5.0 KiB
C
188 lines
5.0 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2013, 2021 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp/irq-generic.h>
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#include <mcf548x/mcf548x.h>
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void asm_default_interrupt(void);
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typedef void (*void_func)(void);
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static uint32_t vector_to_reg(rtems_vector_number vector)
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{
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return ((vector + 32U) >> 5) & 0x1;
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}
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static uint32_t vector_to_bit(rtems_vector_number vector)
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{
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return 1U << (vector & 0x1fU);
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}
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static volatile uint32_t *vector_to_imr(rtems_vector_number vector)
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{
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volatile uint32_t *imr = &MCF548X_INTC_IMRH;
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return &imr[vector_to_reg(vector)];
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}
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static rtems_vector_number exception_vector_to_vector(
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rtems_vector_number exception_vector
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)
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{
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return exception_vector - 64U;
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}
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static rtems_vector_number vector_to_exception_vector(
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rtems_vector_number vector
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)
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{
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return vector + 64U;
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}
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rtems_status_code bsp_interrupt_get_attributes(
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rtems_vector_number vector,
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rtems_interrupt_attributes *attributes
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)
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{
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_is_pending(
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rtems_vector_number vector,
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bool *pending
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(pending != NULL);
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*pending = false;
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_vector_is_enabled(
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rtems_vector_number vector,
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bool *enabled
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(enabled != NULL);
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*enabled = false;
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
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{
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volatile uint32_t *imr = vector_to_imr(vector);
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uint32_t bit = vector_to_bit(vector);
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rtems_interrupt_level level;
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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rtems_interrupt_disable(level);
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*imr &= ~bit;
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rtems_interrupt_enable(level);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
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{
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volatile uint32_t *imr = vector_to_imr(vector);
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uint32_t bit = vector_to_bit(vector);
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rtems_interrupt_level level;
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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rtems_interrupt_disable(level);
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*imr |= bit;
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rtems_interrupt_enable(level);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_set_priority(
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rtems_vector_number vector,
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uint32_t priority
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_get_priority(
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rtems_vector_number vector,
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uint32_t *priority
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(priority != NULL);
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return RTEMS_UNSATISFIED;
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}
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static void set_exception_handler(rtems_vector_number vector, void_func handler)
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{
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void **vbr;
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void_func *exception_table;
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m68k_get_vbr(vbr);
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exception_table = (void_func *)vbr;
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exception_table[vector_to_exception_vector(vector)] = handler;
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}
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static void dispatch_handler(rtems_vector_number exception_vector)
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{
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bsp_interrupt_handler_dispatch_unchecked(
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exception_vector_to_vector(exception_vector)
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);
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}
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void mcf548x_interrupt_vector_install(rtems_vector_number vector)
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{
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_ISR_Vector_table[vector_to_exception_vector(vector)]
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= dispatch_handler;
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set_exception_handler(vector, _ISR_Handler);
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}
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void mcf548x_interrupt_vector_remove(rtems_vector_number vector)
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{
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set_exception_handler(vector, asm_default_interrupt);
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}
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