forked from Imagelibrary/rtems
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* SUPPORT, LICENSE: New files. * Numerous files touched as part of merging the 4.5 branch onto the mainline development trunk and ensuring that the script that cuts snapshots and releases works on the documentation.
77 lines
2.8 KiB
Perl
77 lines
2.8 KiB
Perl
@c
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@c COPYRIGHT (c) 1988-2002.
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@c On-Line Applications Research Corporation (OAR).
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@c All rights reserved.
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@c
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@c $Id$
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@c
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@chapter Board Support Packages
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@section Introduction
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An RTEMS Board Support Package (BSP) must be designed
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to support a particular processor and target board combination.
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This chapter presents a discussion of PowerPC specific BSP issues.
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For more information on developing a BSP, refer to the chapter
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titled Board Support Packages in the RTEMS
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Applications User's Guide.
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@section System Reset
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An RTEMS based application is initiated or
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re-initiated when the PowerPC processor is reset. The PowerPC
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architecture defines a Reset Exception, but leaves the
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details of the CPU state as implementation specific. Please
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refer to the User's Manual for the CPU model in question.
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In general, at power-up the PowerPC begin execution at address
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0xFFF00100 in supervisor mode with all exceptions disabled. For
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soft resets, the CPU will vector to either 0xFFF00100 or 0x00000100
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depending upon the setting of the Exception Prefix bit in the MSR.
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If during a soft reset, a Machine Check Exception occurs, then the
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CPU may execute a hard reset.
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@section Processor Initialization
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It is the responsibility of the application's
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initialization code to initialize the CPU and board
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to a quiescent state before invoking the @code{rtems_initialize_executive}
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directive. It is recommended that the BSP utilize the @code{predriver_hook}
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to install default handlers for all exceptions. These default handlers
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may be overwritten as various device drivers and subsystems install
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their own exception handlers. Upon completion of RTEMS executive
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initialization, all interrupts are enabled.
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If this PowerPC implementation supports on-chip caching
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and this is to be utilized, then it should be enabled during the
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reset application initialization code. On-chip caching has been
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observed to prevent some emulators from working properly, so it
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may be necessary to run with caching disabled to use these emulators.
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In addition to the requirements described in the
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@b{Board Support Packages} chapter of the @b{@value{LANGUAGE}
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Applications User's Manual} for the reset code
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which is executed before the call to @code{rtems_initialize_executive},
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the PowrePC version has the following specific requirements:
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@itemize @bullet
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@item Must leave the PR bit of the Machine State Register (MSR) set
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to 0 so the PowerPC remains in the supervisor state.
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@item Must set stack pointer (sp or r1) such that a minimum stack
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size of MINIMUM_STACK_SIZE bytes is provided for the
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@code{rtems_initialize_executive} directive.
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@item Must disable all external interrupts (i.e. clear the EI (EE)
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bit of the machine state register).
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@item Must enable traps so window overflow and underflow
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conditions can be properly handled.
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@item Must initialize the PowerPC's initial Exception Table with default
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handlers.
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@end itemize
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