forked from Imagelibrary/rtems
e58f80cb40
* sapi/include/confdefs.h, score/cpu/i386/cpu.c: Fix typos so you really can define a user scheduler.
247 lines
6.6 KiB
C
247 lines
6.6 KiB
C
/*
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* Intel i386 Dependent Source
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems.h>
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#include <rtems/system.h>
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#include <rtems/score/types.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/idtr.h>
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#include <rtems/bspIo.h>
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#include <rtems/score/thread.h>
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/* _CPU_Initialize
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*
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* This routine performs processor dependent initialization.
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*
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* INPUT PARAMETERS: NONE
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*/
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void _CPU_Initialize(void)
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{
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#if CPU_HARDWARE_FP
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register uint16_t fp_status __asm__ ("ax");
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register Context_Control_fp *fp_context;
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#endif
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/*
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* The following code saves a NULL i387 context which is given
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* to each task at start and restart time. The following code
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* is based upon that provided in the i386 Programmer's
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* Manual and should work on any coprocessor greater than
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* the i80287.
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*
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* NOTE: The NO WAIT form of the coprocessor instructions
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* MUST be used in case there is not a coprocessor
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* to wait for.
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*/
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#if CPU_HARDWARE_FP
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fp_status = 0xa5a5;
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__asm__ volatile( "fninit" );
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__asm__ volatile( "fnstsw %0" : "=a" (fp_status) : "0" (fp_status) );
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if ( fp_status == 0 ) {
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fp_context = &_CPU_Null_fp_context;
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#ifdef __SSE__
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asm volatile( "fstcw %0":"=m"(fp_context->fpucw) );
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#else
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__asm__ volatile( "fsave (%0)" : "=r" (fp_context)
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: "0" (fp_context)
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);
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#endif
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}
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#endif
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#ifdef __SSE__
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__asm__ volatile("stmxcsr %0":"=m"(fp_context->mxcsr));
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/* The BSP must enable the SSE extensions (early).
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* If any SSE instruction was already attempted
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* then that crashed the system.
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* As a courtesy, we double-check here but it
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* may be too late (which is also why we don't
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* enable SSE here).
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*/
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{
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uint32_t cr4;
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__asm__ __volatile__("mov %%cr4, %0":"=r"(cr4));
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if ( 0x600 != (cr4 & 0x600) ) {
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printk("PANIC: RTEMS was compiled for SSE but BSP did not enable it (CR4: 0x%08x)\n", cr4);
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while ( 1 ) {
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__asm__ __volatile__("hlt");
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}
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}
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}
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#endif
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}
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/*PAGE
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*
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* _CPU_ISR_Get_level
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*/
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uint32_t _CPU_ISR_Get_level( void )
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{
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uint32_t level;
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i386_get_interrupt_level( level );
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return level;
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}
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void *_CPU_Thread_Idle_body( uintptr_t ignored )
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{
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while(1){
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__asm__ volatile ("hlt");
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}
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return NULL;
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}
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struct Frame_ {
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struct Frame_ *up;
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uintptr_t pc;
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};
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void _defaultExcHandler (CPU_Exception_frame *ctx)
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{
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unsigned int faultAddr = 0;
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printk("----------------------------------------------------------\n");
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printk("Exception %d caught at PC %x by thread %d\n",
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ctx->idtIndex,
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ctx->eip,
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_Thread_Executing->Object.id);
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printk("----------------------------------------------------------\n");
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printk("Processor execution context at time of the fault was :\n");
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printk("----------------------------------------------------------\n");
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printk(" EAX = %x EBX = %x ECX = %x EDX = %x\n",
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ctx->eax, ctx->ebx, ctx->ecx, ctx->edx);
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printk(" ESI = %x EDI = %x EBP = %x ESP = %x\n",
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ctx->esi, ctx->edi, ctx->ebp, ctx->esp0);
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printk("----------------------------------------------------------\n");
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printk("Error code pushed by processor itself (if not 0) = %x\n",
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ctx->faultCode);
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printk("----------------------------------------------------------\n");
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if (ctx->idtIndex == I386_EXCEPTION_PAGE_FAULT){
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faultAddr = i386_get_cr2();
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printk("Page fault linear address (CR2) = %x\n", faultAddr);
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printk("----------------------------------------------------------\n\n");
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}
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if (_ISR_Nest_level > 0) {
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/*
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* In this case we shall not delete the task interrupted as
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* it has nothing to do with the fault. We cannot return either
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* because the eip points to the faulty instruction so...
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*/
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printk("Exception while executing ISR!!!. System locked\n");
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_CPU_Fatal_halt(faultAddr);
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}
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else {
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struct Frame_ *fp = (struct Frame_*)ctx->ebp;
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int i;
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printk("Call Stack Trace of EIP:\n");
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if ( fp ) {
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for ( i=1; fp->up; fp=fp->up, i++ ) {
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printk("0x%08x ",fp->pc);
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if ( ! (i&3) )
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printk("\n");
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}
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}
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printk("\n");
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/*
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* OK I could probably use a simplified version but at least this
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* should work.
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*/
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#if 0
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printk(" ************ FAULTY THREAD WILL BE SUSPENDED **************\n");
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rtems_task_suspend(_Thread_Executing->Object.id);
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#endif
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bsp_reset();
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}
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}
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cpuExcHandlerType _currentExcHandler = _defaultExcHandler;
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extern void rtems_exception_prologue_0(void);
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extern void rtems_exception_prologue_1(void);
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extern void rtems_exception_prologue_2(void);
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extern void rtems_exception_prologue_3(void);
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extern void rtems_exception_prologue_4(void);
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extern void rtems_exception_prologue_5(void);
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extern void rtems_exception_prologue_6(void);
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extern void rtems_exception_prologue_7(void);
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extern void rtems_exception_prologue_8(void);
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extern void rtems_exception_prologue_9(void);
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extern void rtems_exception_prologue_10(void);
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extern void rtems_exception_prologue_11(void);
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extern void rtems_exception_prologue_12(void);
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extern void rtems_exception_prologue_13(void);
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extern void rtems_exception_prologue_14(void);
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extern void rtems_exception_prologue_16(void);
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extern void rtems_exception_prologue_17(void);
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extern void rtems_exception_prologue_18(void);
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#ifdef __SSE__
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extern void rtems_exception_prologue_19(void);
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#endif
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static rtems_raw_irq_hdl tbl[] = {
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rtems_exception_prologue_0,
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rtems_exception_prologue_1,
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rtems_exception_prologue_2,
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rtems_exception_prologue_3,
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rtems_exception_prologue_4,
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rtems_exception_prologue_5,
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rtems_exception_prologue_6,
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rtems_exception_prologue_7,
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rtems_exception_prologue_8,
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rtems_exception_prologue_9,
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rtems_exception_prologue_10,
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rtems_exception_prologue_11,
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rtems_exception_prologue_12,
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rtems_exception_prologue_13,
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rtems_exception_prologue_14,
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0,
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rtems_exception_prologue_16,
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rtems_exception_prologue_17,
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rtems_exception_prologue_18,
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#ifdef __SSE__
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rtems_exception_prologue_19,
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#endif
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};
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void rtems_exception_init_mngt(void)
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{
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size_t i,j;
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interrupt_gate_descriptor *currentIdtEntry;
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unsigned limit;
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unsigned level;
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i = sizeof(tbl) / sizeof (rtems_raw_irq_hdl);
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i386_get_info_from_IDTR (¤tIdtEntry, &limit);
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_CPU_ISR_Disable(level);
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for (j = 0; j < i; j++) {
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create_interrupt_gate_descriptor (¤tIdtEntry[j], tbl[j]);
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}
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_CPU_ISR_Enable(level);
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}
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