forked from Imagelibrary/rtems
83 lines
2.2 KiB
C
83 lines
2.2 KiB
C
/**
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* @file
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*
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* @ingroup RTEMSBSPsPowerPCMPC55XX
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*
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* @brief Register definitions for the MPC55xx and MPC56xx microcontroller
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* family.
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*/
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/*
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* Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBCPU_POWERPC_MPC55XX_REGS_H
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#define LIBCPU_POWERPC_MPC55XX_REGS_H
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#include <bspopts.h>
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#if MPC55XX_CHIP_FAMILY == 551
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#include <mpc55xx/fsl-mpc551x.h>
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#define MPC55XX_HAS_EBI
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#define MPC55XX_HAS_ESCI
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#define MPC55XX_HAS_EMIOS
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#define MPC55XX_HAS_FMPLL_ENHANCED
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#define MPC55XX_HAS_SIU
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#elif MPC55XX_CHIP_FAMILY == 555
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#include <mpc55xx/fsl-mpc555x.h>
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#define MPC55XX_HAS_EBI
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#define MPC55XX_HAS_ESCI
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#define MPC55XX_HAS_EMIOS
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#define MPC55XX_HAS_FMPLL
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#define MPC55XX_HAS_UNIFIED_CACHE
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#define MPC55XX_HAS_SIU
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#elif MPC55XX_CHIP_FAMILY == 556
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#include <mpc55xx/fsl-mpc556x.h>
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#define MPC55XX_HAS_EBI
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#define MPC55XX_HAS_ESCI
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#define MPC55XX_HAS_EMIOS
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#define MPC55XX_HAS_FMPLL
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#define MPC55XX_HAS_UNIFIED_CACHE
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#define MPC55XX_HAS_SIU
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#elif MPC55XX_CHIP_FAMILY == 564
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#include <mpc55xx/fsl-mpc564xL.h>
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#define MPC55XX_HAS_STM
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#define MPC55XX_HAS_SWT
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#define MPC55XX_HAS_MODE_CONTROL
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#define MPC55XX_HAS_INSTRUCTION_CACHE
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#define MPC55XX_HAS_LINFLEX
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#define MPC55XX_HAS_SECOND_INTERNAL_RAM_AREA
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#define MPC55XX_HAS_SIU_LITE
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#elif MPC55XX_CHIP_FAMILY == 566
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#include <mpc55xx/fsl-mpc5668.h>
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#define MPC55XX_HAS_ESCI
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#define MPC55XX_HAS_EMIOS
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#define MPC55XX_HAS_FMPLL_ENHANCED
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#define MPC55XX_HAS_UNIFIED_CACHE
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#define MPC55XX_HAS_SIU
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/*
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* TODO: This e200z650n3e core has a wait instruction, but it did not wake-up
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* from PIT interrupts.
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*/
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#elif MPC55XX_CHIP_FAMILY == 567
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#include <mpc55xx/fsl-mpc567x.h>
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#define MPC55XX_HAS_EBI
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#define MPC55XX_HAS_ESCI
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#define MPC55XX_HAS_EMIOS
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#define MPC55XX_HAS_FMPLL_ENHANCED
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#define MPC55XX_HAS_INSTRUCTION_CACHE
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#define MPC55XX_HAS_DATA_CACHE
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#define MPC55XX_HAS_SIU
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#define MPC55XX_HAS_WAIT_INSTRUCTION
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#else
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#error "unsupported chip type"
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#endif
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#define MPC55XX_ZERO_FLAGS { .R = 0 }
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#endif /* LIBCPU_POWERPC_MPC55XX_REGS_H */
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