forked from Imagelibrary/rtems
362 lines
14 KiB
C
362 lines
14 KiB
C
/*===============================================================*\
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| Project: RTEMS generic MPC5200 BSP |
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+-----------------------------------------------------------------+
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| Partially based on the code references which are named below. |
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| Adaptions, modifications, enhancements and any recent parts of |
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| the code are: |
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| Copyright (c) 2005 |
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| Embedded Brains GmbH |
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| Obere Lagerstr. 30 |
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| D-82178 Puchheim |
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| Germany |
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| rtems@embedded-brains.de |
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| Reworked by Joel Sherrill to use clockdrv_shell.c |
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+-----------------------------------------------------------------+
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| The license and distribution terms for this file may be |
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| found in the file LICENSE in this distribution or at |
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| http://www.rtems.com/license/LICENSE. |
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+-----------------------------------------------------------------+
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| this file contains the clock driver functions |
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\*===============================================================*/
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/***********************************************************************/
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/* */
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/* Module: clock.c */
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/* Date: 07/17/2003 */
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/* Purpose: RTEMS MPC5x00 clock driver */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Description: Use one of the GPTs for time base generation */
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/* instead of the decrementer. The routine initializes */
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/* the General Purpose Timer GPT6 on the MPC5x00. */
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/* The tick frequency is specified by the bsp. */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Code */
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/* References: Clock driver for PPC403 */
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/* Module: clock.c */
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/* Project: RTEMS 4.6.0pre1 / PPC403 BSP */
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/* Version 1.16 */
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/* Date: 2002/11/01 */
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/* Author(s) / Copyright(s): */
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/* */
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/* Author: Jay Monkman (jmonkman@frasca.com) */
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/* Copyright (C) 1998 by Frasca International, Inc. */
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/* */
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/* Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c: */
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/* */
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/* Author: Andrew Bray <andy@i-cubed.co.uk> */
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/* */
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/* COPYRIGHT (c) 1995 by i-cubed ltd. */
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/* */
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/* To anyone who acknowledges that this file is provided "AS IS" */
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/* without any express or implied warranty: */
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/* permission to use, copy, modify, and distribute this file */
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/* for any purpose is hereby granted without fee, provided that */
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/* the above copyright notice and this notice appears in all */
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/* copies, and that the name of i-cubed limited not be used in */
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/* advertising or publicity pertaining to distribution of the */
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/* software without specific, written prior permission. */
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/* i-cubed limited makes no representations about the suitability */
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/* of this software for any purpose. */
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/* */
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/* Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c: */
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/* */
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/* Modifications for deriving timer clock from cpu system clock by */
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/* Thomas Doerfler <td@imd.m.isar.de> */
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/* for these modifications: */
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/* COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. */
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/* */
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/* COPYRIGHT (c) 1989-2007. */
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/* On-Line Applications Research Corporation (OAR). */
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/* */
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/* The license and distribution terms for this file may be */
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/* found in the file LICENSE in this distribution or at */
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/* http://www.rtems.com/license/LICENSE. */
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/* */
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/* Modifications for PPC405GP by Dennis Ehlin */
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/*---------------------------------------------------------------------*/
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/* */
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/* Partially based on the code references which are named above. */
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/* Adaptions, modifications, enhancements and any recent parts of */
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/* the code are under the right of */
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/* */
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/* IPR Engineering, Dachauer Straße 38, D-80335 München */
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/* Copyright(C) 2003 */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* IPR Engineering makes no representation or warranties with */
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/* respect to the performance of this computer program, and */
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/* specifically disclaims any responsibility for any damages, */
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/* special or consequential, connected with the use of this program. */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Version history: 1.0 */
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/* */
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/***********************************************************************/
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#include <bsp.h>
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#include <rtems/bspIo.h>
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#include "../irq/irq.h"
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#include <rtems.h>
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#include <rtems/clockdrv.h>
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#include <rtems/libio.h>
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#include <stdlib.h> /* for atexit() */
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#include "../include/mpc5200.h"
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#define GPT (BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0)
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/* this lets us do nanoseconds since last tick */
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uint64_t Clock_last_TBR;
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volatile uint32_t counter_value;
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volatile int ClockInitialized = 0;
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/*
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* ISR Handlers
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*/
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void mpc5200_gpt_clock_isr(rtems_irq_hdl_param handle)
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{
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uint32_t status;
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)handle;
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status = gpt->status;
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if (ClockInitialized && (status & GPT_STATUS_TEXP)) {
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gpt->status |= GPT_STATUS_TEXP;
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Clock_last_TBR = PPC_Get_timebase_register();
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Clock_driver_ticks++;
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rtems_clock_tick();
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}
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}
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/*
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* Initialize MPC5x00 GPT
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*/
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void mpc5200_init_gpt(uint32_t gpt_no)
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{
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
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gpt->status = GPT_STATUS_RESET;
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gpt->emsel = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN |
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GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO;
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}
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/*
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* Set MPC5x00 GPT counter
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*/
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void mpc5200_set_gpt_count(uint32_t counter_value, uint32_t gpt_no)
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{
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uint32_t prescaler_value = 1;
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uint32_t counter = counter_value;
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
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/* Calculate counter/prescaler value, e.g.
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* IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs
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*/
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while ((counter >= (1 << 16)) && (prescaler_value < (1 << 16))) {
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prescaler_value++;
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counter = counter_value / prescaler_value;
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}
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counter = (uint16_t)counter;
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gpt->count_in = (prescaler_value << 16) + counter;
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}
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uint32_t bsp_clock_nanoseconds_since_last_tick(void)
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{
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uint64_t new_tbr;
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uint64_t bus_cycles;
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uint32_t nsecs;
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new_tbr = PPC_Get_timebase_register();
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bus_cycles = (new_tbr - Clock_last_TBR) * 4;
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nsecs = (uint32_t) (bus_cycles / (XLB_CLOCK / 1000000)) * 1000;
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return nsecs;
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}
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/*
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* Enable MPC5x00 GPT interrupt
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*/
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void mpc5200_enable_gpt_int(uint32_t gpt_no)
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{
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
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gpt->emsel |= GPT_EMSEL_CE | GPT_EMSEL_INTEN;
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Clock_last_TBR = PPC_Get_timebase_register();
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}
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/*
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* Disable MPC5x00 GPT interrupt
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*/
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void mpc5200_disable_gpt_int(uint32_t gpt_no)
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{
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
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gpt->emsel &= ~(GPT_EMSEL_CE | GPT_EMSEL_INTEN);
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}
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/*
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* Check MPC5x00 GPT status
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*/
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uint32_t mpc5200_check_gpt_status(uint32_t gpt_no)
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{
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
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return ((gpt->emsel) & (GPT_EMSEL_CE | GPT_EMSEL_INTEN));
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}
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void clockOn(const rtems_irq_connect_data* irq)
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{
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uint32_t gpt_no;
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extern uint32_t bsp_clicks_per_usec;
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gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
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counter_value = rtems_configuration_get_microseconds_per_tick() *
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bsp_clicks_per_usec;
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mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
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mpc5200_enable_gpt_int((uint32_t)gpt_no);
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ClockInitialized = 1;
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}
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void clockOff(const rtems_irq_connect_data* irq)
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{
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uint32_t gpt_no;
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gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
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mpc5200_disable_gpt_int((uint32_t)gpt_no);
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ClockInitialized = 0;
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}
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int clockIsOn(const rtems_irq_connect_data* irq)
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{
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uint32_t gpt_no;
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gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
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if (mpc5200_check_gpt_status(gpt_no) && ClockInitialized)
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return ClockInitialized;
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return 0;
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}
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int BSP_get_clock_irq_level()
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{
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/*
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* Caution : if you change this, you must change the
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* definition of BSP_PERIODIC_TIMER accordingly
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*/
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return BSP_PERIODIC_TIMER;
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}
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int BSP_disconnect_clock_handler (void)
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{
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rtems_irq_connect_data clockIrqData;
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clockIrqData.name = BSP_PERIODIC_TIMER;
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if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
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printk("Unable to stop system clock\n");
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rtems_fatal_error_occurred(1);
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}
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return BSP_remove_rtems_irq_handler (&clockIrqData);
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}
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int BSP_connect_clock_handler (uint32_t gpt_no)
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{
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rtems_irq_hdl hdl = 0;
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rtems_irq_connect_data clockIrqData;
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/*
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* Reinit structure
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*/
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clockIrqData.name = BSP_PERIODIC_TIMER;
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if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
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printk("Unable to get system clock handler\n");
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rtems_fatal_error_occurred(1);
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}
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if (!BSP_remove_rtems_irq_handler (&clockIrqData)) {
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printk("Unable to remove current system clock handler\n");
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rtems_fatal_error_occurred(1);
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}
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if ((gpt_no >= GPT0) || (gpt_no <= GPT7)) {
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hdl = (rtems_irq_hdl_param )&mpc5200.gpt[gpt_no];
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} else {
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printk("Unable to set system clock handler\n");
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rtems_fatal_error_occurred(1);
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}
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clockIrqData.hdl = mpc5200_gpt_clock_isr;
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clockIrqData.handle = (rtems_irq_hdl_param) hdl;
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clockIrqData.on = clockOn;
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clockIrqData.off = clockOff;
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clockIrqData.isOn = clockIsOn;
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return BSP_install_rtems_irq_handler (&clockIrqData);
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}
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#define CLOCK_VECTOR 0
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#define Clock_driver_support_at_tick() \
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do { \
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uint32_t status; \
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struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[GPT]); \
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\
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status = gpt->status; \
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\
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if (ClockInitialized && (status & GPT_STATUS_TEXP)) { \
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gpt->status |= GPT_STATUS_TEXP; \
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Clock_last_TBR = PPC_Get_timebase_register(); \
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} \
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} while(0)
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#define Clock_driver_support_install_isr( _new, _old ) \
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do { \
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(_old) = NULL; /* avoid warning */; \
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BSP_connect_clock_handler(GPT); \
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} while(0)
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/* This driver does this in clockOn called at connection time */
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#define Clock_driver_support_initialize_hardware() \
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do { \
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extern uint32_t bsp_clicks_per_usec; \
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counter_value = rtems_configuration_get_microseconds_per_tick() * \
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bsp_clicks_per_usec; \
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mpc5200_init_gpt(GPT); \
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mpc5200_set_gpt_count(counter_value, GPT); \
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} while (0)
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#define Clock_driver_nanoseconds_since_last_tick \
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bsp_clock_nanoseconds_since_last_tick
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#define Clock_driver_support_shutdown_hardware() \
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do { \
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(void) BSP_disconnect_clock_handler (); \
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} while (0)
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#include "../../../shared/clockdrv_shell.c"
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