forked from Imagelibrary/rtems
e01e499490
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
531 lines
22 KiB
ArmAsm
531 lines
22 KiB
ArmAsm
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* Common start code for SPARC.
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*
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* This is based on the file srt0.s provided with the binary
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* distribution of the SPARC Instruction Simulator (SIS) found
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* at ftp://ftp.estec.esa.nl/pub/ws/wsd/erc32.
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*/
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/*
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* COPYRIGHT (c) 1989-2011.
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* On-Line Applications Research Corporation (OAR).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rtems/asm.h>
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#include <rtems/score/percpu.h>
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#include <bspopts.h>
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#if defined(RTEMS_SMP) && defined(BSP_LEON3_SMP)
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#define START_LEON3_ENABLE_SMP
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#endif
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#define TRAP_SYM(_vector) SYM(trap_##_vector)
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/*
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* Unexpected trap will lead to an RTEMS fatal error.
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*/
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#define BAD_TRAP(_vector) \
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TRAP_SYM(_vector):; \
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TRAP(_vector, _SPARC_Bad_trap)
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/*
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* External interrupt trap
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*/
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#define ISR_TRAP(_vector) \
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TRAP_SYM(_vector):; \
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TRAP(_vector - 0x10, _SPARC_Interrupt_trap)
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/*
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* System call optimized trap table entry
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*/
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#define FPDIS_TRAP(_handler) \
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mov %psr, %l0 ; \
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sethi %hi(_handler), %l4 ; \
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jmp %l4+%lo(_handler); \
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sethi %hi(SPARC_PSR_EF_MASK), %l3
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/*
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* System call optimized trap table entry
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*/
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#define IRQDIS_TRAP(_handler) \
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mov %psr, %l0 ; \
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sethi %hi(_handler), %l4 ; \
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jmp %l4+%lo(_handler); \
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or %l0, 0x0f00, %l3; ! Set PIL=0xf to disable IRQ
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/*
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* System call optimized trap table entry
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*/
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#define IRQEN_TRAP(_handler) \
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mov %psr, %l0 ; \
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sethi %hi(_handler), %l4 ; \
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jmp %l4+%lo(_handler); \
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andn %l0, 0xf00, %l3; ! Set PIL=0 to Enable IRQ
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/*
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* Window Overflow optimized trap table entry
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*/
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#define WOTRAP(_vector, _handler) \
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sethi %hi(_handler), %l4; \
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jmp %l4+%lo(_handler); \
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save; \
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nop
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/*
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* Window Underflow optimized trap table entry
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*/
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#define WUTRAP(_vector, _handler) \
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mov %wim, %l3 ; \
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sethi %hi(_handler), %l4 ; \
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jmp %l4+%lo(_handler); \
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sll %l3, 1, %l4 ! l4 = WIM << 1
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/*
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* Software trap. Treat as BAD_TRAP for the time being...
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*/
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#define SOFT_TRAP(_vector) BAD_TRAP(_vector)
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.section ".text"
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PUBLIC(start)
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.global start
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SYM(start):
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#if SYM(start) != start
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start:
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#endif
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/*
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* The trap table has to be the first code in a boot PROM. But because
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* the Memory Configuration comes up thinking we only have 4K of PROM, we
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* cannot have a full trap table and still have room left over to
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* reprogram the Memory Configuration register correctly. This file
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* uses an abbreviated trap which has every entry which might be used
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* before RTEMS installs its own trap table.
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*/
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PUBLIC(trap_table)
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SYM(trap_table):
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RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
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BAD_TRAP(0x01) ! 01 instruction access
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! exception
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BAD_TRAP(0x02) ! 02 illegal instruction
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BAD_TRAP(0x03) ! 03 privileged instruction
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#if defined(SPARC_USE_LAZY_FP_SWITCH)
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TRAP_SYM(0x04):
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FPDIS_TRAP(SYM(syscall_lazy_fp_switch)); ! 04 fp disabled
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#else
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BAD_TRAP(0x04) ! 04 fp disabled
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#endif
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TRAP_SYM(0x05):
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WOTRAP(5, SYM(window_overflow_trap_handler)); ! 05 window overflow
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TRAP_SYM(0x06):
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WUTRAP(6, SYM(window_underflow_trap_handler));! 06 window underflow
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BAD_TRAP(0x07) ! 07 memory address not aligned
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BAD_TRAP(0x08) ! 08 fp exception
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BAD_TRAP(0x09) ! 09 data access exception
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BAD_TRAP(0x0a) ! 0A tag overflow
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BAD_TRAP(0x0b) ! 0B undefined
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BAD_TRAP(0x0c) ! 0C undefined
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BAD_TRAP(0x0d) ! 0D undefined
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BAD_TRAP(0x0e) ! 0E undefined
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BAD_TRAP(0x0f) ! 0F undefined
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/*
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* External interrupt traps
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*/
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ISR_TRAP(0x10) ! 10 undefined
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ISR_TRAP(0x11) ! 11 external interrupt 1
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ISR_TRAP(0x12) ! 12 external interrupt 2
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ISR_TRAP(0x13) ! 13 external interrupt 3
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ISR_TRAP(0x14) ! 14 external interrupt 4
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ISR_TRAP(0x15) ! 15 external interrupt 5
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ISR_TRAP(0x16) ! 16 external interrupt 6
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ISR_TRAP(0x17) ! 17 external interrupt 7
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ISR_TRAP(0x18) ! 18 external interrupt 8
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ISR_TRAP(0x19) ! 19 external interrupt 9
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ISR_TRAP(0x1a) ! 1A external interrupt 10
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ISR_TRAP(0x1b) ! 1B external interrupt 11
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ISR_TRAP(0x1c) ! 1C external interrupt 12
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ISR_TRAP(0x1d) ! 1D external interrupt 13
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ISR_TRAP(0x1e) ! 1E external interrupt 14
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ISR_TRAP(0x1f) ! 1F external interrupt 15
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BAD_TRAP(0x20) ! 20 undefined
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BAD_TRAP(0x21) ! 21 undefined
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BAD_TRAP(0x22) ! 22 undefined
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BAD_TRAP(0x23) ! 23 undefined
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BAD_TRAP(0x24) ! 24 cp_disabled
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BAD_TRAP(0x25) ! 25 undefined
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BAD_TRAP(0x26) ! 26 undefined
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BAD_TRAP(0x27) ! 27 undefined
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BAD_TRAP(0x28) ! 28 cp_exception
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BAD_TRAP(0x29) ! 29 undefined
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BAD_TRAP(0x2a) ! 2A undefined
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BAD_TRAP(0x2b) ! 2B undefined
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BAD_TRAP(0x2c) ! 2C undefined
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BAD_TRAP(0x2d) ! 2D undefined
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BAD_TRAP(0x2e) ! 2E undefined
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BAD_TRAP(0x2f) ! 2F undefined
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BAD_TRAP(0x30) ! 30 undefined
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BAD_TRAP(0x31) ! 31 undefined
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BAD_TRAP(0x32) ! 32 undefined
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BAD_TRAP(0x33) ! 33 undefined
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BAD_TRAP(0x34) ! 34 undefined
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BAD_TRAP(0x35) ! 35 undefined
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BAD_TRAP(0x36) ! 36 undefined
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BAD_TRAP(0x37) ! 37 undefined
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BAD_TRAP(0x38) ! 38 undefined
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BAD_TRAP(0x39) ! 39 undefined
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BAD_TRAP(0x3a) ! 3A undefined
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BAD_TRAP(0x3b) ! 3B undefined
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BAD_TRAP(0x3c) ! 3C undefined
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BAD_TRAP(0x3d) ! 3D undefined
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BAD_TRAP(0x3e) ! 3E undefined
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BAD_TRAP(0x3f) ! 3F undefined
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BAD_TRAP(0x40) ! 40 undefined
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BAD_TRAP(0x41) ! 41 undefined
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BAD_TRAP(0x42) ! 42 undefined
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BAD_TRAP(0x43) ! 43 undefined
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BAD_TRAP(0x44) ! 44 undefined
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BAD_TRAP(0x45) ! 45 undefined
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BAD_TRAP(0x46) ! 46 undefined
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BAD_TRAP(0x47) ! 47 undefined
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BAD_TRAP(0x48) ! 48 undefined
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BAD_TRAP(0x49) ! 49 undefined
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BAD_TRAP(0x4a) ! 4A undefined
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BAD_TRAP(0x4b) ! 4B undefined
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BAD_TRAP(0x4c) ! 4C undefined
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BAD_TRAP(0x4d) ! 4D undefined
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BAD_TRAP(0x4e) ! 4E undefined
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BAD_TRAP(0x4f) ! 4F undefined
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BAD_TRAP(0x50) ! 50 undefined
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BAD_TRAP(0x51) ! 51 undefined
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BAD_TRAP(0x52) ! 52 undefined
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BAD_TRAP(0x53) ! 53 undefined
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BAD_TRAP(0x54) ! 54 undefined
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BAD_TRAP(0x55) ! 55 undefined
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BAD_TRAP(0x56) ! 56 undefined
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BAD_TRAP(0x57) ! 57 undefined
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BAD_TRAP(0x58) ! 58 undefined
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BAD_TRAP(0x59) ! 59 undefined
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BAD_TRAP(0x5a) ! 5A undefined
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BAD_TRAP(0x5b) ! 5B undefined
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BAD_TRAP(0x5c) ! 5C undefined
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BAD_TRAP(0x5d) ! 5D undefined
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BAD_TRAP(0x5e) ! 5E undefined
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BAD_TRAP(0x5f) ! 5F undefined
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BAD_TRAP(0x60) ! 60 undefined
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BAD_TRAP(0x61) ! 61 undefined
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BAD_TRAP(0x62) ! 62 undefined
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BAD_TRAP(0x63) ! 63 undefined
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BAD_TRAP(0x64) ! 64 undefined
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BAD_TRAP(0x65) ! 65 undefined
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BAD_TRAP(0x66) ! 66 undefined
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BAD_TRAP(0x67) ! 67 undefined
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BAD_TRAP(0x68) ! 68 undefined
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BAD_TRAP(0x69) ! 69 undefined
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BAD_TRAP(0x6a) ! 6A undefined
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BAD_TRAP(0x6b) ! 6B undefined
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BAD_TRAP(0x6c) ! 6C undefined
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BAD_TRAP(0x6d) ! 6D undefined
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BAD_TRAP(0x6e) ! 6E undefined
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BAD_TRAP(0x6f) ! 6F undefined
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BAD_TRAP(0x70) ! 70 undefined
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BAD_TRAP(0x71) ! 71 undefined
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BAD_TRAP(0x72) ! 72 undefined
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BAD_TRAP(0x73) ! 73 undefined
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BAD_TRAP(0x74) ! 74 undefined
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BAD_TRAP(0x75) ! 75 undefined
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BAD_TRAP(0x76) ! 76 undefined
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BAD_TRAP(0x77) ! 77 undefined
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BAD_TRAP(0x78) ! 78 undefined
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BAD_TRAP(0x79) ! 79 undefined
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BAD_TRAP(0x7a) ! 7A undefined
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BAD_TRAP(0x7b) ! 7B undefined
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/*
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This is a sad patch to make sure that we know where the
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MEC timer control register mirror is so we can stop the timers
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from an external debugger. It is needed because the control
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register is write-only. Trap 0x7C cannot occure in ERC32...
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*/
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.global SYM(_ERC32_MEC_Timer_Control_Mirror), SYM(CLOCK_SPEED)
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SYM(_ERC32_MEC_Timer_Control_Mirror):
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BAD_TRAP(0x7C) ! 7C undefined
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BAD_TRAP(0x7D) ! 7D undefined
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SYM(CLOCK_SPEED):
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TRAP_SYM(0x7e):
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.word 0x0a, 0, 0, 0 ! 7E (10 MHz default)
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BAD_TRAP(0x7F) ! 7F undefined
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/*
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* Software traps
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*
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* NOTE: At the risk of being redundant... this is not a full
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* table. The setjmp on the SPARC requires a window flush trap
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* handler and RTEMS will preserve the entries that were
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* installed before.
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*/
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TRAP_SYM(0x80):
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TRAP( 0x80, SYM(syscall) ); ! 80 halt syscall SW trap
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SOFT_TRAP(0x81) ! 81
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SOFT_TRAP(0x82) ! 82
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TRAP_SYM(0x83):
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TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap
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SOFT_TRAP(0x84) ! 84
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SOFT_TRAP(0x85) ! 85
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SOFT_TRAP(0x86) ! 86
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SOFT_TRAP(0x87) ! 87
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SOFT_TRAP(0x88) ! 88
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/*
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* SW Trap 9-15 Reserved for Operating System
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*
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* SPARC_SWTRAP_IRQDIS
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* SPARC_SWTRAP_IRQEN
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*/
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TRAP_SYM(0x89):
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IRQDIS_TRAP(SYM(syscall_irqdis)); ! 89 IRQ Disable syscall trap
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TRAP_SYM(0x8a):
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IRQEN_TRAP(SYM(syscall_irqen)); ! 8A IRQ Enable syscall trap
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#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
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TRAP_SYM(0x8b):
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IRQDIS_TRAP(SYM(syscall_irqdis_fp)); ! 8B IRQ disable
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! and set PSR[EF] syscall trap
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#else
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SOFT_TRAP(0x8b) ! 8B
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#endif
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SOFT_TRAP(0x8c) ! 8C
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SOFT_TRAP(0x8d) ! 8D
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SOFT_TRAP(0x8e) ! 8E
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SOFT_TRAP(0x8f) ! 8F
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SOFT_TRAP(0x90) ! 90
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SOFT_TRAP(0x91) ! 91
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SOFT_TRAP(0x92) ! 92
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SOFT_TRAP(0x93) ! 93
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SOFT_TRAP(0x94) ! 94
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SOFT_TRAP(0x95) ! 95
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SOFT_TRAP(0x96) ! 96
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SOFT_TRAP(0x97) ! 97
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SOFT_TRAP(0x98) ! 98
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SOFT_TRAP(0x99) ! 99
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SOFT_TRAP(0x9a) ! 9A
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SOFT_TRAP(0x9b) ! 9B
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SOFT_TRAP(0x9c) ! 9C
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SOFT_TRAP(0x9d) ! 9D
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SOFT_TRAP(0x9e) ! 9E
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SOFT_TRAP(0x9f) ! 9F
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SOFT_TRAP(0xa0) ! a0
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SOFT_TRAP(0xa1) ! a1
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SOFT_TRAP(0xa2) ! a2
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SOFT_TRAP(0xa3) ! a3
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SOFT_TRAP(0xa4) ! a4
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SOFT_TRAP(0xa5) ! a5
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SOFT_TRAP(0xa6) ! a6
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SOFT_TRAP(0xa7) ! a7
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SOFT_TRAP(0xa8) ! a8
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SOFT_TRAP(0xa9) ! a9
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SOFT_TRAP(0xaa) ! aA
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SOFT_TRAP(0xab) ! aB
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SOFT_TRAP(0xac) ! aC
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SOFT_TRAP(0xad) ! aD
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SOFT_TRAP(0xae) ! aE
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SOFT_TRAP(0xaf) ! aF
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SOFT_TRAP(0xb0) ! b0
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SOFT_TRAP(0xb1) ! b1
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SOFT_TRAP(0xb2) ! b2
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SOFT_TRAP(0xb3) ! b3
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SOFT_TRAP(0xb4) ! b4
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SOFT_TRAP(0xb5) ! b5
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SOFT_TRAP(0xb6) ! b6
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SOFT_TRAP(0xb7) ! b7
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SOFT_TRAP(0xb8) ! b8
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SOFT_TRAP(0xb9) ! b9
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SOFT_TRAP(0xba) ! bA
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SOFT_TRAP(0xbb) ! bB
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SOFT_TRAP(0xbc) ! bC
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SOFT_TRAP(0xbd) ! bD
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SOFT_TRAP(0xbe) ! bE
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SOFT_TRAP(0xbf) ! bF
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SOFT_TRAP(0xc0) ! c0
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SOFT_TRAP(0xc1) ! c1
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SOFT_TRAP(0xc2) ! c2
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SOFT_TRAP(0xc3) ! c3
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SOFT_TRAP(0xc4) ! c4
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SOFT_TRAP(0xc5) ! c5
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SOFT_TRAP(0xc6) ! c6
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SOFT_TRAP(0xc7) ! c7
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SOFT_TRAP(0xc8) ! c8
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SOFT_TRAP(0xc9) ! c9
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SOFT_TRAP(0xca) ! cA
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SOFT_TRAP(0xcb) ! cB
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SOFT_TRAP(0xcc) ! cC
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SOFT_TRAP(0xcd) ! cD
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SOFT_TRAP(0xce) ! cE
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SOFT_TRAP(0xcf) ! cF
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SOFT_TRAP(0xd0) ! d0
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SOFT_TRAP(0xd1) ! d1
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SOFT_TRAP(0xd2) ! d2
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SOFT_TRAP(0xd3) ! d3
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SOFT_TRAP(0xd4) ! d4
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SOFT_TRAP(0xd5) ! d5
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SOFT_TRAP(0xd6) ! d6
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SOFT_TRAP(0xd7) ! d7
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SOFT_TRAP(0xd8) ! d8
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SOFT_TRAP(0xd9) ! d9
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SOFT_TRAP(0xda) ! dA
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SOFT_TRAP(0xdb) ! dB
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SOFT_TRAP(0xdc) ! dC
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SOFT_TRAP(0xdd) ! dD
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SOFT_TRAP(0xde) ! dE
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SOFT_TRAP(0xdf) ! dF
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SOFT_TRAP(0xe0) ! e0
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SOFT_TRAP(0xe1) ! e1
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SOFT_TRAP(0xe2) ! e2
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SOFT_TRAP(0xe3) ! e3
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SOFT_TRAP(0xe4) ! e4
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SOFT_TRAP(0xe5) ! e5
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SOFT_TRAP(0xe6) ! e6
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SOFT_TRAP(0xe7) ! e7
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SOFT_TRAP(0xe8) ! e8
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SOFT_TRAP(0xe9) ! e9
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SOFT_TRAP(0xea) ! eA
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SOFT_TRAP(0xeb) ! eB
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SOFT_TRAP(0xec) ! eC
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SOFT_TRAP(0xed) ! eD
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SOFT_TRAP(0xee) ! eE
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SOFT_TRAP(0xef) ! eF
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SOFT_TRAP(0xf0) ! f0
|
|
SOFT_TRAP(0xf1) ! f1
|
|
SOFT_TRAP(0xf2) ! f2
|
|
SOFT_TRAP(0xf3) ! f3
|
|
SOFT_TRAP(0xf4) ! f4
|
|
SOFT_TRAP(0xf5) ! f5
|
|
SOFT_TRAP(0xf6) ! f6
|
|
SOFT_TRAP(0xf7) ! f7
|
|
SOFT_TRAP(0xf8) ! f8
|
|
SOFT_TRAP(0xf9) ! f9
|
|
SOFT_TRAP(0xfa) ! fA
|
|
SOFT_TRAP(0xfb) ! fB
|
|
SOFT_TRAP(0xfc) ! fC
|
|
SOFT_TRAP(0xfd) ! fD
|
|
SOFT_TRAP(0xfe) ! fE
|
|
SOFT_TRAP(0xff) ! fF
|
|
|
|
/*
|
|
* This is the hard reset code.
|
|
*/
|
|
|
|
#define PSR_INIT 0x10c0 /* Disable traps, set s and ps */
|
|
#define WIM_INIT 2
|
|
|
|
PUBLIC(hard_reset)
|
|
SYM(hard_reset):
|
|
|
|
/* Common initialisation */
|
|
|
|
set SYM(trap_table), %g1 ! Initialize TBR
|
|
mov %g1, %tbr
|
|
|
|
mov %psr, %g1 ! Initialize WIM
|
|
add %g1, 1, %g2
|
|
and %g2, 0x7, %g2
|
|
set 1, %g3
|
|
sll %g3, %g2, %g3
|
|
mov %g3, %wim
|
|
|
|
or %g1, 0xf20, %g1
|
|
wr %g1, %psr ! enable traps and disable ints
|
|
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
mov %sp, %o0 ! save end of usable RAM provided by the boot loader
|
|
set SYM(_Per_CPU_Information), %g6 ! set per-CPU control
|
|
set SYM(_ISR_Stack_size), %l0 ! get ISR stack size
|
|
|
|
#if defined(START_LEON3_ENABLE_SMP)
|
|
rd %asr17, %l7 ! get CPU identifier
|
|
srl %l7, LEON3_ASR17_PROCESSOR_INDEX_SHIFT, %l7
|
|
add %l7, 1, %l1 ! get ISR stack offset for this CPU
|
|
smul %l1, %l0, %l0
|
|
sll %l7, PER_CPU_CONTROL_SIZE_LOG2, %l2 ! per-CPU for this CPU
|
|
add %g6, %l2, %g6
|
|
#endif
|
|
set SYM(_ISR_Stack_area_begin), %sp ! set stack pointer
|
|
add %sp, %l0, %sp
|
|
andn %sp, CPU_STACK_ALIGNMENT - 1, %sp
|
|
sub %sp, SPARC_MINIMUM_STACK_FRAME_SIZE, %sp
|
|
mov %sp, %fp ! set frame pointer
|
|
|
|
#if defined(START_LEON3_ENABLE_SMP)
|
|
/* If LEON3_Boot_Cpu < 0 then assign us as boot CPU and continue. */
|
|
set SYM(LEON3_Boot_Cpu), %l0
|
|
ld [%l0], %l1
|
|
tst %l1
|
|
bneg .Lbootcpu
|
|
nop
|
|
|
|
call SYM(bsp_start_on_secondary_processor) ! does not return
|
|
mov %g6, %o0
|
|
.Lbootcpu:
|
|
st %l7, [%l0]
|
|
#endif
|
|
|
|
/* clear the bss */
|
|
|
|
sethi %hi(__bss_start), %g2 ! g2 = start of bss
|
|
or %g2,%lo(__bss_start),%g2
|
|
|
|
sethi %hi(_end),%g3
|
|
or %g3,%lo(_end),%g3 ! g3 = end of bss
|
|
mov %g0,%g1 ! so std has two zeros
|
|
.Lzerobss:
|
|
std %g0,[%g2]
|
|
add %g2,8,%g2
|
|
cmp %g2,%g3
|
|
bleu,a .Lzerobss
|
|
nop
|
|
|
|
call SYM(_SPARC_Memory_initialize)
|
|
nop ! o0 = end of usable RAM provided by the boot loader
|
|
|
|
call SYM(boot_card) ! does not return
|
|
mov %g0, %o0 ! command line
|
|
|
|
/* end of file */
|