forked from Imagelibrary/rtems
217 lines
4.7 KiB
ArmAsm
217 lines
4.7 KiB
ArmAsm
/*
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* Epiphany CPU Dependent Source
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*
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* Copyright (c) 2015 University of York.
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* Hesham ALMatary <hmka501@york.ac.uk>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/asm.h>
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.section .text,"ax"
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.align 4
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PUBLIC(_CPU_Context_switch)
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PUBLIC(_CPU_Context_restore)
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PUBLIC(_CPU_Context_restore_fp)
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PUBLIC(_CPU_Context_save_fp)
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PUBLIC(restore)
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SYM(_CPU_Context_switch):
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/* Disable interrupts and store all registers */
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gid
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str r0, [r0]
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str r1, [r0,1]
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str r2, [r0,2]
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str r3, [r0,3]
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str r4, [r0,4]
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str r5, [r0,5]
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str r6, [r0,6]
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str r7, [r0,7]
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str r8, [r0,8]
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str r9, [r0,9]
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str r10, [r0,10]
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str fp, [r0,11]
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str r12, [r0,12]
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str sp, [r0,13]
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str lr, [r0,14]
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str r15, [r0,15]
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str r16, [r0,16]
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str r17, [r0,17]
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str r18, [r0,18]
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str r19, [r0,19]
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str r20, [r0,20]
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str r21, [r0,21]
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str r22, [r0,22]
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str r23, [r0,23]
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str r24, [r0,24]
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str r25, [r0,25]
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str r26, [r0,26]
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str r27, [r0,27]
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str r28, [r0,28]
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str r29, [r0,29]
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str r30, [r0,30]
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str r31, [r0,31]
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str r32, [r0,32]
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str r33, [r0,33]
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str r34, [r0,34]
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str r35, [r0,35]
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str r36, [r0,36]
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str r37, [r0,37]
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str r38, [r0,38]
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str r39, [r0,39]
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str r40, [r0,40]
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str r41, [r0,41]
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str r42, [r0,42]
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str r43, [r0,43]
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str r44, [r0,44]
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str r45, [r0,45]
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str r46, [r0,46]
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str r47, [r0,47]
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str r48, [r0,48]
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str r49, [r0,49]
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str r50, [r0,50]
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str r51, [r0,51]
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str r52, [r0,52]
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str r53, [r0,53]
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str r54, [r0,54]
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str r55, [r0,55]
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str r56, [r0,56]
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str r57, [r0,57]
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str r58, [r0,58]
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str r59, [r0,59]
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str r60, [r0,60]
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str r61, [r0,61]
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str r62, [r0,62]
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str r63, [r0,63]
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/* Store status register */
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movfs r27, status
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str r27, [r0,64]
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/* Store config register */
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movfs r27, config
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str r27, [r0,65]
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/* Store interrupt return address register */
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movfs r27, iret
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str r27, [r0,66]
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SYM(restore):
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/* r1 contains buffer address, skip it */
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ldr r2, [r1,2]
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ldr r3, [r1,3]
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ldr r4, [r1,4]
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ldr r5, [r1,5]
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ldr r6, [r1,6]
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ldr r7, [r1,7]
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ldr r8, [r1,8]
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ldr r9, [r1,9]
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ldr r10, [r1,10]
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ldr fp, [r1,11]
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ldr r12, [r1,12]
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ldr sp, [r1,13]
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ldr lr, [r1,14]
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ldr r15, [r1,15]
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ldr r16, [r1,16]
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ldr r17, [r1,17]
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ldr r18, [r1,18]
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ldr r19, [r1,19]
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ldr r20, [r1,20]
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ldr r21, [r1,21]
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ldr r22, [r1,22]
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ldr r23, [r1,23]
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ldr r24, [r1,24]
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ldr r25, [r1,25]
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ldr r26, [r1,26]
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ldr r27, [r1,27]
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ldr r32, [r1,32]
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ldr r33, [r1,33]
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ldr r34, [r1,34]
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ldr r35, [r1,35]
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ldr r36, [r1,36]
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ldr r37, [r1,37]
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ldr r38, [r1,38]
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ldr r39, [r1,39]
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ldr r40, [r1,40]
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ldr r41, [r1,41]
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ldr r42, [r1,42]
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ldr r43, [r1,43]
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ldr r44, [r1,44]
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ldr r45, [r1,45]
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ldr r46, [r1,46]
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ldr r47, [r1,47]
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ldr r48, [r1,48]
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ldr r49, [r1,49]
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ldr r50, [r1,50]
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ldr r51, [r1,51]
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ldr r52, [r1,52]
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ldr r53, [r1,53]
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ldr r54, [r1,54]
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ldr r55, [r1,55]
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ldr r56, [r1,56]
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ldr r57, [r1,57]
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ldr r58, [r1,58]
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ldr r59, [r1,59]
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ldr r60, [r1,60]
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ldr r61, [r1,61]
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ldr r62, [r1,62]
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ldr r63, [r1,63]
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/* Load status register */
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ldr r0, [r1,64]
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movts status, r0
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/* Load config register */
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ldr r0, [r1,65]
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movts config, r0
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/* Load interrupt return address register */
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ldr r0,[r1,66]
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movts iret, r0
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ldr r0,[r1]
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ldr r1,[r1,1]
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/* Enable interrupts and return */
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gie
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jr lr
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SYM(_CPU_Context_restore):
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mov r1, r0
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b _restore
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nop
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/* No FP support for Epiphany yet */
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SYM(_CPU_Context_restore_fp):
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nop
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SYM(_CPU_Context_save_fp):
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nop
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