forked from Imagelibrary/rtems
105 lines
3.2 KiB
C
105 lines
3.2 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup m68k_gen68340
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*
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* @brief Time driver definitions.
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*/
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/*
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* Header file for timer driver
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* defines for accessing M68340 timer registers
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*
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* Author:
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* Geoffroy Montel
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* France Telecom - CNET/DSM/TAM/CAT
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* 4, rue du Clos Courtel
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* 35512 CESSON-SEVIGNE
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* FRANCE
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*
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* e-mail: g_montel@yahoo.com
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __m340timer_H__
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#define __m340timer_H__
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extern void Fifo_Full_benchmark_timer_initialize (void);
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extern void (*Restart_Fifo_Full_A_Timer)(void);
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extern void (*Restart_Check_A_Timer)(void);
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extern void (*Restart_Fifo_Full_B_Timer)(void);
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extern void (*Restart_Check_B_Timer)(void);
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/* CR */
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#define m340_SWR (1<<15)
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#define m340_Polling_Mode (0<<12)
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#define m340_TC_Enabled (1<<12)
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#define m340_TG_Enabled (2<<12)
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#define m340_TG_TC_Enabled (3<<12)
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#define m340_TO_Enabled (4<<12)
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#define m340_TO_TC_Enabled (5<<12)
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#define m340_TG_TG_Enabled (6<<12)
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#define m340_TO_TG_TG_Enabled (7<<12)
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#define m340_TGE (1<<11)
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#define m340_PSE (1<<10)
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#define m340_CPE (1<<9)
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#define m340_CLK (1<<8)
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#define m340_Divide_by_2 (1<<5)
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#define m340_Divide_by_4 (2<<5)
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#define m340_Divide_by_8 (3<<5)
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#define m340_Divide_by_16 (4<<5)
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#define m340_Divide_by_32 (5<<5)
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#define m340_Divide_by_64 (6<<5)
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#define m340_Divide_by_128 (7<<5)
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#define m340_Divide_by_256 (0<<5)
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#define m340_ICOC (0<<2)
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#define m340_SWG (1<<2)
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#define m340_VDCSWG (2<<2)
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#define m340_VWSSPG (3<<2)
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#define m340_PWM (4<<2)
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#define m340_PM (5<<2)
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#define m340_EC (6<<2)
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#define m340_TB (7<<2)
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#define m340_Disabled 0
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#define m340_Toggle_Mode 1
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#define m340_Zero_Mode 2
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#define m340_One_Mode 3
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/* SR */
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#define m340_IRQ (1<<15)
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#define m340_TO (1<<14)
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#define m340_TG (1<<13)
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#define m340_TC (1<<12)
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#define m340_TGL (1<<11)
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#define m340_ON (1<<10)
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#define m340_OUT (1<<9)
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#define m340_COM (1<<8)
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#endif
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