rtems

RTOS/rtems

Files

Sebastian Huber d5e073cde7 score: Allow interrupts during thread dispatch

Use a processor-specific interrupt frame during context switches in case
the executing thread is longer executes on the processor and the heir
thread is about to start execution.  During this period we must not use
a thread stack for interrupt processing.

Update #2809.

2016-11-18 07:30:34 +01:00

arm

bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by level.

2016-09-07 20:29:39 +02:00

bfin

score: Add and use Thread_Control::is_idle

2016-11-09 15:27:30 +01:00

i386

i386: refactor libcpu/cpu.h into rtems/score/i386.h

2016-03-03 16:36:30 -05:00

lm32

Update bug report URL

2014-12-05 07:47:32 +01:00

m68k

libcpu/m68k/mcf5272/clock/ckinit.c: Fix warning by including <rtems/clockdrv.h>

2016-03-27 18:41:57 -05:00

mips

bsps/mips: Use <libcpu/isr_entries.h>

2016-11-18 07:30:32 +01:00

nios2

Update bug report URL

2014-12-05 07:47:32 +01:00

or1k

score: Rename _ISR_Disable() and _ISR_Enable()

2016-05-20 07:50:37 +02:00

powerpc

score: Allow interrupts during thread dispatch

2016-11-18 07:30:34 +01:00

score: Rename _ISR_Disable() and _ISR_Enable()

2016-05-20 07:50:37 +02:00

shared

rtems+bsps/cache: Define cache manager operations for code synchronization and maximal alignment.

2016-07-04 15:55:57 +02:00

sparc

sparc: Fix window underflow trap handler

2016-03-17 11:09:08 +01:00

sparc64

sparc64: Rename CPU_Minimum_stack_frame

2016-11-18 07:30:32 +01:00

Makefile.am

rtems: Move rtems_cache_aligned_malloc()

2014-11-25 16:08:16 +01:00

README

Remove All CVS Id Strings Possible Using a Script

2012-05-11 08:44:13 -05:00

README

This is the README file for libcpu.

This directory contains reusable libraries which are CPU dependent but not
target board dependent.  For example, the PowerPC has an on CPU decrementer
register which may be used by all PowerPC BSP's for the Clock and Timer
Drivers.

Other examples include the caching support for the m68k CPU models and
MIPS CPU model exception vectoring routines.  This level of support
will make it easier for others developing embedded applications on a given
CPU.