forked from Imagelibrary/rtems
192 lines
4.0 KiB
C
192 lines
4.0 KiB
C
/**
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* @file
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*
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* @ingroup mpc83xx
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*
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* @brief Source for BSP startup code.
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*/
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/*
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* Copyright (c) 2008
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* Embedded Brains GmbH
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* Obere Lagerstr. 30
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* D-82178 Puchheim
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* Germany
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* rtems@embedded-brains.de
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*
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#include <string.h>
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#include <rtems/libio.h>
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#include <rtems/libcsupport.h>
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#include <rtems/score/thread.h>
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#include <libcpu/powerpc-utility.h>
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#include <bsp.h>
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#include <bsp/bootcard.h>
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#include <bsp/irq-generic.h>
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#include <bsp/ppc_exc_bspsupp.h>
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#ifdef HAS_UBOOT
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/*
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* We want this in the data section, because the startup code clears the BSS
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* section after the initialization of the board info.
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*/
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bd_t mpc83xx_uboot_board_info = { .bi_baudrate = 123 };
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/* Size in words */
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const size_t mpc83xx_uboot_board_info_size = (sizeof( bd_t) + 3) / 4;
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#endif /* HAS_UBOOT */
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/* Configuration parameters for console driver, ... */
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unsigned int BSP_bus_frequency;
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/* Configuration parameters for clock driver, ... */
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uint32_t bsp_clicks_per_usec;
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/*
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* Use the shared implementations of the following routines.
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* Look in rtems/c/src/lib/libbsp/shared/bsplibc.c.
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*/
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extern void cpu_init( void);
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void BSP_panic( char *s)
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{
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rtems_interrupt_level level;
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rtems_interrupt_disable( level);
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printk( "%s PANIC %s\n", _RTEMS_version, s);
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while (1) {
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/* Do nothing */
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}
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}
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void _BSP_Fatal_error( unsigned n)
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{
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rtems_interrupt_level level;
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rtems_interrupt_disable( level);
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printk( "%s PANIC ERROR %u\n", _RTEMS_version, n);
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while (1) {
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/* Do nothing */
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}
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}
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void bsp_pretasking_hook( void)
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{
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/* Do noting */
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}
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void bsp_get_work_area( void **work_area_start, size_t *work_area_size, void **heap_start, size_t *heap_size)
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{
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#ifdef HAS_UBOOT
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char *ram_end = (char *) mpc83xx_uboot_board_info.bi_memstart + mpc83xx_uboot_board_info.bi_memsize;
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#else /* HAS_UBOOT */
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char *ram_end = bsp_ram_end;
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#endif /* HAS_UBOOT */
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*work_area_start = bsp_work_area_start;
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*work_area_size = ram_end - bsp_work_area_start;
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*heap_start = BSP_BOOTCARD_HEAP_USES_WORK_AREA;
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*heap_size = BSP_BOOTCARD_HEAP_SIZE_DEFAULT;
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}
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void bsp_start( void)
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{
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ppc_cpu_id_t myCpu;
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ppc_cpu_revision_t myCpuRevision;
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uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
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uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
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/*
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* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
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* store the result in global variables so that it can be used latter...
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*/
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myCpu = get_ppc_cpu_type();
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myCpuRevision = get_ppc_cpu_revision();
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/* Basic CPU initialization */
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cpu_init();
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/*
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* Enable instruction and data caches. Do not force writethrough mode.
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*/
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#if INSTRUCTION_CACHE_ENABLE
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rtems_cache_enable_instruction();
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#endif
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#if DATA_CACHE_ENABLE
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rtems_cache_enable_data();
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#endif
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/*
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* This is evaluated during runtime, so it should be ok to set it
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* before we initialize the drivers.
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*/
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/* Initialize some device driver parameters */
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#ifdef HAS_UBOOT
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BSP_bus_frequency = mpc83xx_uboot_board_info.bi_busfreq;
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#else /* HAS_UBOOT */
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BSP_bus_frequency = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID;
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#endif /* HAS_UBOOT */
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bsp_clicks_per_usec = BSP_bus_frequency / 4000000;
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/* Initialize exception handler */
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ppc_exc_initialize(
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PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
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interrupt_stack_start,
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interrupt_stack_size
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);
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/* Initalize interrupt support */
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if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
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BSP_panic("Cannot intitialize interrupt support\n");
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}
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Exit from bspstart\n");
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#endif
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}
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/**
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* @brief Idle thread body.
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*
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* Replaces the one in c/src/exec/score/src/threadidlebody.c
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* The MSR[POW] bit is set to put the CPU into the low power mode
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* defined in HID0. HID0 is set during starup in start.S.
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*/
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Thread _Thread_Idle_body( uint32_t ignored)
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{
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while (1) {
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asm volatile (
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"mfmsr 3;"
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"oris 3, 3, 4;"
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"sync;"
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"mtmsr 3;"
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"isync;"
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"ori 3, 3, 0;"
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"ori 3, 3, 0"
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);
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}
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return NULL;
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}
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