forked from Imagelibrary/rtems
d19cce29dc
Use a per-CPU thread dispatch disable level. So instead of one global thread dispatch disable level we have now one instance per processor. This is a major performance improvement for SMP. On non-SMP configurations this may simplifiy the interrupt entry/exit code. The giant lock is still present, but it is now decoupled from the thread dispatching in _Thread_Dispatch(), _Thread_Handler(), _Thread_Restart_self() and the interrupt entry/exit. Access to the giant lock is now available via _Giant_Acquire() and _Giant_Release(). The giant lock is still implicitly acquired via _Thread_Dispatch_decrement_disable_level(). The giant lock is only acquired for high-level operations in interrupt handlers (e.g. release of a semaphore, sending of an event). As a side-effect this change fixes the lost thread dispatch necessary indication bug in _Thread_Dispatch(). A per-CPU thread dispatch disable level greatly simplifies the SMP support for the interrupt entry/exit code since no spin locks have to be acquired in this area. It is only necessary to get the current processor index and use this to calculate the address of the own per-CPU control. This reduces the interrupt latency considerably. All elements for the interrupt entry/exit code are now part of the Per_CPU_Control structure: thread dispatch disable level, ISR nest level and thread dispatch necessary. Nothing else is required (except CPU port specific stuff like on SPARC).
This directory contains the RTEMS Classic API Timing Test Suite. The tests in this directory are used to measure the execution time of RTEMS directive and some critical internal functions. The results of these test are useful for comparison of RTEMS performance + between versions of RTEMS + between different boards + across different architectures These tests attempt to benchmark RTEMS as the user would. They measure the execution time for a directive (under various circumstances) from the time RTEMS is entered until it is executed. Where possible, the time is the average of at least 100 invocations of the directive. The accuracy of the times reported by these benchmarks is very dependent on the resolution of the timer being used. It is also important to insure that all sources of hardware interrupts are disabled during execution of the tests. This insures that the directive time reported does not include any interrupt time.