Sebastian Huber cfd885850a bsps/aarch64: Use fatal error for data cache disable ...

On the Cortex-A cores, at least the L1 data cache is required to provide
support for atomic operations.

Update #5050.

2024-10-11 01:27:48 +02:00

..

bsps

bsps: Move <bsp/linker-symbols.h> to shared

2024-10-11 01:27:48 +02:00

cpukit

aarch64: Move exception frame support

2024-10-11 01:27:48 +02:00

testsuites

bsps/aarch64: Use fatal error for data cache disable

2024-10-11 01:27:48 +02:00

grp.yml

Update company name

2023-05-20 11:05:26 +02:00