forked from Imagelibrary/rtems
cb8379dc09
Without this smp05 and smpthreadlife01 tests may fail depending on how the boot loader initialized the GPTIMER. Before the time counter stopped counting when reaching zero, but tests could work since it could take 2^32 us before stopping. The timer driver will potentially overwrite this, but it happens later due to the initialization order having RTEMS_SYSINIT_CPU_COUNTER very early. Update #4312.
80 lines
2.4 KiB
C
80 lines
2.4 KiB
C
/*
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* Copyright (c) 2014, 2018 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <leon.h>
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#include <rtems/counter.h>
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#include <rtems/sysinit.h>
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#include <rtems/score/sparcimpl.h>
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static uint32_t leon3_counter_frequency = 1000000000;
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uint32_t _CPU_Counter_frequency(void)
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{
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return leon3_counter_frequency;
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}
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static void leon3_counter_initialize(void)
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{
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volatile struct irqmp_timestamp_regs *irqmp_ts;
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volatile struct gptimer_regs *gpt;
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SPARC_Counter *counter;
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irqmp_ts = &LEON3_IrqCtrl_Regs->timestamp[0];
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gpt = LEON3_Timer_Regs;
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counter = &_SPARC_Counter_mutable;
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leon3_up_counter_enable();
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if (leon3_up_counter_is_available()) {
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/* Use the LEON4 up-counter if available */
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counter->read_isr_disabled = _SPARC_Counter_read_asr23;
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counter->read = _SPARC_Counter_read_asr23;
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leon3_counter_frequency = leon3_up_counter_frequency();
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} else if (leon3_irqmp_has_timestamp(irqmp_ts)) {
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/* Use the interrupt controller timestamp counter if available */
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counter->read_isr_disabled = _SPARC_Counter_read_up;
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counter->read = _SPARC_Counter_read_up;
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counter->counter_register = &LEON3_IrqCtrl_Regs->timestamp[0].counter;
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/* Enable interrupt timestamping for an arbitrary interrupt line */
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irqmp_ts->control = 0x1;
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leon3_counter_frequency = ambapp_freq_get(&ambapp_plb, LEON3_IrqCtrl_Adev);
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} else if (gpt != NULL) {
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/* Fall back to the first GPTIMER if available */
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counter->read_isr_disabled = _SPARC_Counter_read_down;
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counter->read = _SPARC_Counter_read_down;
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counter->counter_register = &gpt->timer[LEON3_COUNTER_GPTIMER_INDEX].value;
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/* Enable timer just in case no clock driver is configured */
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gpt->timer[LEON3_COUNTER_GPTIMER_INDEX].reload = 0xffffffff;
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gpt->timer[LEON3_COUNTER_GPTIMER_INDEX].ctrl |= GPTIMER_TIMER_CTRL_EN |
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GPTIMER_TIMER_CTRL_RS |
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GPTIMER_TIMER_CTRL_LD;
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leon3_counter_frequency = ambapp_freq_get(&ambapp_plb, LEON3_Timer_Adev) /
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(gpt->scaler_reload + 1);
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}
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}
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RTEMS_SYSINIT_ITEM(
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leon3_counter_initialize,
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RTEMS_SYSINIT_CPU_COUNTER,
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RTEMS_SYSINIT_ORDER_FIRST
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);
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SPARC_COUNTER_DEFINITION;
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