forked from Imagelibrary/rtems
246 lines
8.1 KiB
C
246 lines
8.1 KiB
C
/* GRTM Telemetry (TM) driver interface
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*
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* COPYRIGHT (c) 2007.
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* Cobham Gaisler AB.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __GRTM_H__
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#define __GRTM_H__
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#include <rtems.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GRTM_IOC_UNUSED 0
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/* Driver operation controlling commands */
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#define GRTM_IOC_START 1
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#define GRTM_IOC_STOP 2
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#define GRTM_IOC_ISSTARTED 3
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#define GRTM_IOC_SET_BLOCKING_MODE 4
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#define GRTM_IOC_SET_TIMEOUT 5
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/* Available only in STOPPED mode */
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#define GRTM_IOC_SET_CONFIG 32
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/* Available in both running and stopped mode */
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#define GRTM_IOC_RECLAIM 64
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#define GRTM_IOC_GET_CONFIG 65
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#define GRTM_IOC_GET_HW_IMPL 66
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#define GRTM_IOC_GET_HW_STATUS 67 /* Not implemented */
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#define GRTM_IOC_GET_OCFREG 68
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#define GRTM_IOC_GET_STATS 69
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#define GRTM_IOC_CLR_STATS 70
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/* Available only in RUNNING mode */
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#define GRTM_IOC_SEND 96
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/* Args to GRTC_IOC_SET_BLOCKING_MODE */
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enum {
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GRTM_BLKMODE_POLL = 0, /* Never block (polling mode) */
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GRTM_BLKMODE_BLK = 1, /* Block until at least 1 byte can be read */
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};
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/* Reed Solomon Encoder implemented */
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enum {
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GRTM_RS_IMPL_NONE = 0,
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GRTM_RS_IMPL_E16 = 1, /* E16 */
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GRTM_RS_IMPL_E8 = 2, /* E8 */
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GRTM_RS_IMPL_BOTH = 3 /* Both E8 and E16 */
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};
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struct grtm_ioc_hw {
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char cs; /* Sub Carrier */
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char sp; /* Split-Phase Level */
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char ce;
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char nrz;
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char psr;
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char te;
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unsigned char rsdep;
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unsigned char rs;
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char aasm;
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char fecf;
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char ocf;
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char evc;
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char idle;
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char fsh;
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char mcg;
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char iz;
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char fhec;
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char aos;
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char cif;
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char ocfb;
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unsigned short blk_size; /* Block Size */
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unsigned short fifo_size; /* FIFO Size */
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};
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/* Driver Mode */
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enum {
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GRTM_MODE_TM = 0, /* TM */
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GRTM_MODE_AOS = 1 /* AOS */
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};
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/* Physical layer Options */
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#define GRTM_IOC_PHY_SCF (1<<15) /* Sub Carrier Fall */
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#define GRTM_IOC_PHY_SF (1<<31) /* Symbol Fall */
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/* Coding Sub-layer Options */
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#define GRTM_IOC_CODE_SC (1<<0) /* Enable Sub Carrier modulation */
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#define GRTM_IOC_CODE_SP (1<<1) /* Enable Split-Phase (SP) level modulation */
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#define GRTM_IOC_CODE_CE (1<<5) /* Enable Convolutional Encoding */
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#define GRTM_IOC_CODE_NRZ (1<<6) /* Enable Non-Return-to-Zero mark encoding */
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#define GRTM_IOC_CODE_PSR (1<<7) /* Enable Pseudo-Randomizer */
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#define GRTM_IOC_CODE_RS8 (1<<11) /* Reed-solomon Encoder to use: 0=E16, 1=E8 */
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#define GRTM_IOC_CODE_RS (1<<15) /* Enable Reed-Solomon Encoder */
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#define GRTM_IOC_CODE_AASM (1<<16) /* Enable Alternative attached synchronization marker */
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#define GRTM_IOC_CODE_ALL (GRTM_IOC_CODE_SC|GRTM_IOC_CODE_SP|GRTM_IOC_CODE_CE| \
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GRTM_IOC_CODE_NRZ|GRTM_IOC_CODE_PSR|GRTM_IOC_CODE_RS8|\
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GRTM_IOC_CODE_RS|GRTM_IOC_CODE_AASM)
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enum {
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GRTM_CERATE_00 = 0, /* Rate 1/2, no puncturing */
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GRTM_CERATE_02 = 2, /* Rate 1/2, punctured */
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GRTM_CERATE_04 = 4, /* Rate 2/3, punctured */
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GRTM_CERATE_05 = 5, /* Rate 3/4, punctured */
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GRTM_CERATE_06 = 6, /* Rate 5/6, punctured */
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GRTM_CERATE_07 = 7, /* Rate 7/8, punctured */
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};
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/* Options for Generating all frames */
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#define GRTM_IOC_ALL_FHEC 0x01 /* Enable Frame Header Error Control (Only AOS) */
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#define GRTM_IOC_ALL_FECF 0x02 /* Enable Transfer Frame CRC */
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#define GRTM_IOC_ALL_IZ 0x04 /* Enable Insert Zone */
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#define GRTM_IOC_ALL_ALL (GRTM_IOC_ALL_FHEC|GRTM_IOC_ALL_FECF|GRTM_IOC_ALL_IZ)
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/* Master Frame Generation Options */
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#define GRTM_IOC_MF_OW 0x01 /* Over Write OCF bits 16 and 17 */
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#define GRTM_IOC_MF_OCF 0x02 /* Enable Operation Control Field (OCF) for master channel */
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#define GRTM_IOC_MF_FSH 0x04 /* Enable MC_FSH for master channel */
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#define GRTM_IOC_MF_MC 0x08 /* Enable Master channel counter generation */
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#define GRTM_IOC_MF_ALL (GRTM_IOC_MF_OW|GRTM_IOC_MF_OCF|GRTM_IOC_MF_FSH|GRTM_IOC_MF_MC)
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/* Idle Frames Generation Options */
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#define GRTM_IOC_IDLE_MC 0x01 /* Enable Master Channel (MC) counter generation (TM Only) */
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#define GRTM_IOC_IDLE_VCC 0x02 /* Enable Virtual Channel counter cycle generation (AOS Only)*/
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#define GRTM_IOC_IDLE_FSH 0x04 /* Enable Frame Secondary Header (FSH) for idle frames (TM Only) */
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#define GRTM_IOC_IDLE_EVC 0x08 /* Enable Extended Virtual Channel Counter Generation */
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#define GRTM_IOC_IDLE_OCF 0x10 /* Enable OCF/CLCW in idle frame */
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#define GRTM_IOC_IDLE_EN 0x20 /* Enable Idle frame generation */
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#define GRTM_IOC_IDLE_ALL (GRTM_IOC_IDLE_MC|GRTM_IOC_IDLE_VCC|GRTM_IOC_IDLE_FSH| \
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GRTM_IOC_IDLE_EVC|GRTM_IOC_IDLE_OCF|GRTM_IOC_IDLE_EN)
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/* Argument of GRTM_IOC_SET_CONFIG and GRTM_IOC_GET_CONFIG.
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* Driver and Hardware configuration.
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*
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* Pointer to:
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*/
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struct grtm_ioc_config {
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/* Mode AOS or TM */
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unsigned char mode; /* 0=TM, 1=AOS */
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unsigned short frame_length; /* Length of every frame transmitted */
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unsigned short limit; /* Number of data bytes fetched by DMA before transmission starts */
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unsigned int as_marker; /* Attached Synchronization Marker */
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/* Physical layer options */
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unsigned short phy_subrate; /* Sub Carrier rate - sub carrier devision factor - 1 */
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unsigned short phy_symbolrate; /* Symbol Rate division factor - 1 */
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unsigned char phy_opts; /* Mask of GRTM_IOC_PHY_XXXX */
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/* Coding sub-layer Options */
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unsigned char code_rsdep; /* Coding sub-layer Reed-Solomon interleave depth (3-bit) */
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unsigned char code_ce_rate; /* Convolutional encoding rate, select one of GRTM_CERATE_00 ... GRTM_CERATE_07 */
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unsigned char code_csel; /* */
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unsigned int code_opts; /* Mask of GRTM_IOC_CODE_XXXX */
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/* All Frames Generation */
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unsigned char all_izlen; /* FSH/IZ Length (5-bit) */
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unsigned char all_opts; /* Mask of GRTM_IOC_ALL_XXXX */
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/* Master Frame Generation */
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unsigned char mf_opts; /* Mask of GRTM_IOC_MF_XXXX */
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/* Idle frame Generation */
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unsigned short idle_scid;
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unsigned char idle_vcid;
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unsigned char idle_opts; /* Mask of GRTM_IOC_IDLE_XXXX */
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/* Interrupt options */
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unsigned int enable_cnt; /* Number of frames in between Interrupt is generated, Zero disables interrupt */
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int isr_desc_proc; /* Enable ISR to process descriptors */
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int blocking; /* Blocking mode select (POLL,BLK..) */
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rtems_interval timeout; /* Blocking mode timeout */
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};
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struct grtm_frame;
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struct grtm_list {
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struct grtm_frame *head; /* First Frame in list */
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struct grtm_frame *tail; /* Last Frame in list */
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};
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#define GRTM_FLAGS_SENT 0x01
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#define GRRM_FLAGS_ERR 0x02
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#define GRTM_FLAGS_TRANSLATE (1<<31) /* Translate frame payload address from CPU address to remote bus (the bus GRTM is resident on) */
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#define GRTM_FLAGS_TRANSLATE_AND_REMEMBER (1<<30) /* As GRTM_FLAGS_TRANSLATE, however if the translated payload address equals the payload address
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* the GRTM_FLAGS_TRANSLATE_AND_REMEMBER bit is cleared and the GRTM_FLAGS_TRANSLATE bit is set */
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#define GRTM_FLAGS_COPY_DATA (1<<29) /* Where available: Transfer Frame payload to target, may be used for SpaceWire, where the GRTM driver transfer
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* the payload to a buffer on the SpaceWire target.
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*/
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#define GRTM_FLAGS_TS (1<<14)
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#define GRTM_FLAGS_VCE (1<<9)
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#define GRTM_FLAGS_MCB (1<<8)
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#define GRTM_FLAGS_FSHB (1<<7)
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#define GRTM_FLAGS_OCFB (1<<6)
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#define GRTM_FLAGS_FHECB (1<<5)
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#define GRTM_FLAGS_IZB (1<<4)
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#define GRTM_FLAGS_FECFB (1<<3)
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#define GRTM_FLAGS_MASK (GRTM_FLAGS_TS|GRTM_FLAGS_VCE|GRTM_FLAGS_MCB|\
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GRTM_FLAGS_FSHB|GRTM_FLAGS_OCFB|GRTM_FLAGS_FHECB|\
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GRTM_FLAGS_IZB|GRTM_FLAGS_FECFB)
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/* The GRTM software representation of a Frame */
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struct grtm_frame {
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/* Options and status */
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unsigned int flags; /* bypass options, and sent/error status */
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struct grtm_frame *next; /* Next packet in chain */
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unsigned int *payload; /* The Headers and Payload, Frame data and header must be word aligned */
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};
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#define FRAME_SIZE(payloadlen) (sizeof(struct grtm_frame)+payloadlen)
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struct grtm_ioc_stats {
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unsigned long long frames_sent;
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unsigned int err_underrun;
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unsigned int err_tx;
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unsigned int err_ahb;
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unsigned int err_transfer_frame;
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};
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/* Register GRTM driver at driver manager */
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void grtm_register_drv(void);
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/* Register GRTM RMAP driver at driver manager */
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void grtm_rmap_register_drv (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __GRTM_H__ */
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