forked from Imagelibrary/rtems
3e2647a714
Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
105 lines
2.6 KiB
C
105 lines
2.6 KiB
C
/**
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* @file
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*
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* @brief PowerPC Dependent Source
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*/
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/*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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/*
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* For now, this file is just a stub to work around
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* structural deficiencies of the powerpc port.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/system.h>
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#include <rtems/score/cpu.h>
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#define PPC_ASSERT_OFFSET(field, off) \
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RTEMS_STATIC_ASSERT( \
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offsetof(ppc_context, field) + PPC_DEFAULT_CACHE_LINE_SIZE \
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== PPC_CONTEXT_OFFSET_ ## off, \
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ppc_context_offset_ ## field \
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)
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PPC_ASSERT_OFFSET(gpr1, GPR1);
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PPC_ASSERT_OFFSET(msr, MSR);
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PPC_ASSERT_OFFSET(lr, LR);
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PPC_ASSERT_OFFSET(cr, CR);
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PPC_ASSERT_OFFSET(gpr14, GPR14);
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PPC_ASSERT_OFFSET(gpr15, GPR15);
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PPC_ASSERT_OFFSET(gpr16, GPR16);
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PPC_ASSERT_OFFSET(gpr17, GPR17);
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PPC_ASSERT_OFFSET(gpr18, GPR18);
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PPC_ASSERT_OFFSET(gpr19, GPR19);
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PPC_ASSERT_OFFSET(gpr20, GPR20);
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PPC_ASSERT_OFFSET(gpr21, GPR21);
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PPC_ASSERT_OFFSET(gpr22, GPR22);
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PPC_ASSERT_OFFSET(gpr23, GPR23);
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PPC_ASSERT_OFFSET(gpr24, GPR24);
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PPC_ASSERT_OFFSET(gpr25, GPR25);
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PPC_ASSERT_OFFSET(gpr26, GPR26);
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PPC_ASSERT_OFFSET(gpr27, GPR27);
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PPC_ASSERT_OFFSET(gpr28, GPR28);
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PPC_ASSERT_OFFSET(gpr29, GPR29);
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PPC_ASSERT_OFFSET(gpr30, GPR30);
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PPC_ASSERT_OFFSET(gpr31, GPR31);
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PPC_ASSERT_OFFSET(gpr2, GPR2);
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#ifdef RTEMS_SMP
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PPC_ASSERT_OFFSET(is_executing, IS_EXECUTING);
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#endif
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#ifdef PPC_MULTILIB_ALTIVEC
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RTEMS_STATIC_ASSERT(
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PPC_CONTEXT_OFFSET_V20 % 16 == 0,
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ppc_context_altivec
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);
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PPC_ASSERT_OFFSET(v20, V20);
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PPC_ASSERT_OFFSET(v21, V21);
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PPC_ASSERT_OFFSET(v22, V22);
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PPC_ASSERT_OFFSET(v23, V23);
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PPC_ASSERT_OFFSET(v24, V24);
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PPC_ASSERT_OFFSET(v25, V25);
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PPC_ASSERT_OFFSET(v26, V26);
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PPC_ASSERT_OFFSET(v27, V27);
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PPC_ASSERT_OFFSET(v28, V28);
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PPC_ASSERT_OFFSET(v29, V29);
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PPC_ASSERT_OFFSET(v30, V30);
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PPC_ASSERT_OFFSET(v31, V31);
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PPC_ASSERT_OFFSET(vrsave, VRSAVE);
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#endif
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#ifdef PPC_MULTILIB_FPU
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PPC_ASSERT_OFFSET(f14, F14);
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PPC_ASSERT_OFFSET(f15, F15);
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PPC_ASSERT_OFFSET(f16, F16);
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PPC_ASSERT_OFFSET(f17, F17);
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PPC_ASSERT_OFFSET(f18, F18);
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PPC_ASSERT_OFFSET(f19, F19);
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PPC_ASSERT_OFFSET(f20, F20);
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PPC_ASSERT_OFFSET(f21, F21);
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PPC_ASSERT_OFFSET(f22, F22);
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PPC_ASSERT_OFFSET(f23, F23);
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PPC_ASSERT_OFFSET(f24, F24);
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PPC_ASSERT_OFFSET(f25, F25);
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PPC_ASSERT_OFFSET(f26, F26);
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PPC_ASSERT_OFFSET(f27, F27);
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PPC_ASSERT_OFFSET(f28, F28);
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PPC_ASSERT_OFFSET(f29, F29);
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PPC_ASSERT_OFFSET(f30, F30);
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PPC_ASSERT_OFFSET(f31, F31);
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#endif
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RTEMS_STATIC_ASSERT(
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sizeof(Context_Control) % PPC_DEFAULT_CACHE_LINE_SIZE == 0,
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ppc_context_size
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);
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