forked from Imagelibrary/rtems
* rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files. * Makefile.am, preinstall.am: Reflect changes above. * rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M. * rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
85 lines
1.8 KiB
ArmAsm
85 lines
1.8 KiB
ArmAsm
/**
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* @file
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*
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* @ingroup ScoreCPU
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*
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* @brief ARM architecture support implementation.
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*/
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/*
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* $Id$
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*
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* This file contains all assembly code for the ARM implementation
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* of RTEMS.
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*
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* Copyright (c) 2007 by Ray Xu, <Rayx.cn@gmail.com>
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* Thumb support added.
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*
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* Copyright (c) 2002 by Advent Networks, Inc.
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* Jay Monkman <jmonkman@adventnetworks.com>
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*
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* COPYRIGHT (c) 2000 Canon Research Centre France SA.
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* Emmanuel Raguet, mailto:raguet@crf.canon.fr
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/asm.h>
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#include <rtems/score/cpu_asm.h>
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#ifdef ARM_MULTILIB_ARCH_V4
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.text
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/*
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* void _CPU_Context_switch( run_context, heir_context )
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* void _CPU_Context_restore( run_context, heir_context )
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*
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* This routine performs a normal non-FP context.
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*
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* R0 = run_context R1 = heir_context
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*
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* This function copies the current registers to where r0 points, then
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* restores the ones from where r1 points.
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*
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* Using the ldm/stm opcodes save 2-3 us on 100 MHz ARM9TDMI with
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* a 16 bit data bus.
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*
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*/
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DEFINE_FUNCTION_ARM(_CPU_Context_switch)
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/* Start saving context */
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mrs r2, cpsr
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stmia r0, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
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/* Start restoring context */
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_restore:
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ldmia r1, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
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msr cpsr, r2
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#ifdef __thumb__
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bx lr
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nop
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#else
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mov pc, lr
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#endif
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/*
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* void _CPU_Context_restore( new_context )
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*
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* This function copies the restores the registers from where r0 points.
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* It must match _CPU_Context_switch()
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*
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*/
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DEFINE_FUNCTION_ARM(_CPU_Context_restore)
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mov r1, r0
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b _restore
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#endif /* ARM_MULTILIB_ARCH_V4 */
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