forked from Imagelibrary/rtems
c2b3a517f6
Currently, if a BSP is built without MPU alignment enforcement, the MPU is still enabled and can produce a non-functional binary since code can be mixed with data within a memory region and memory regions are marked as read-only or no-execute based on section addresses and sizes leading to overlapping regions being defined which causes the later-defined region to take precedence. This change disables the MPU when alignment is not enforced, allowing the binary to function.
81 lines
2.6 KiB
C
81 lines
2.6 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp.h>
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#include <bsp/bootcard.h>
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#include <bsp/linker-symbols.h>
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#include <bsp/start.h>
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#include <stm32h7/hal.h>
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#include <stm32h7/memory.h>
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#include <stm32h7/mpu-config.h>
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#include <rtems/score/armv7m.h>
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#include <string.h>
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void bsp_start_hook_0(void)
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{
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if ((RCC->AHB3ENR & RCC_AHB3ENR_FMCEN) == 0) {
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/*
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* Only perform the low-level initialization if necessary. An initialized
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* FMC indicates that a boot loader already performed the low-level
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* initialization.
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*/
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SystemInit();
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stm32h7_init_power();
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stm32h7_init_oscillator();
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stm32h7_init_clocks();
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stm32h7_init_peripheral_clocks();
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HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
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HAL_Init();
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SystemInit_ExtMemCtl();
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}
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#if __CORTEX_M == 0x07U
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if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
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SCB_EnableICache();
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}
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if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
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SCB_EnableDCache();
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}
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#ifdef STM32H7_ENABLE_MPU_ALIGNMENT
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_ARMV7M_MPU_Setup(ARMV7M_MPU_CTRL_DEFAULT, stm32h7_config_mpu_region, stm32h7_config_mpu_region_count);
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#endif
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#endif
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}
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void bsp_start_hook_1(void)
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{
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bsp_start_copy_sections_compact();
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#if __CORTEX_M == 0x07U
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SCB_CleanDCache();
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SCB_InvalidateICache();
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#endif
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bsp_start_clear_bss();
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}
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