rtems

RTOS/rtems

Files

Hesham ALMatary c080c3434b or1k: New cache manager.

Implement new cache functions for or1k and create new bspstart function
for or1ksim to initialize instruction and data caches. Also, sim.cfg
is modified to enable/confiure cache units.

2014-09-16 12:46:42 -05:00

arm

Regenerate all preinstall.am files.

2014-08-29 12:48:01 +10:00

bfin

Regenerate all preinstall.am files.

2014-08-29 12:48:01 +10:00

i386

Change all references of rtems.com to rtems.org.

2014-03-21 08:10:47 +11:00

lm32

Regenerate all preinstall.am files.

2014-08-29 12:48:01 +10:00

m68k

m68k/shared/misc/memProbe.c: Add prototype to eliminate warning

2014-06-01 18:18:00 -05:00

mips

Regenerate all preinstall.am files.

2014-08-29 12:48:01 +10:00

nios2

RTEMS: Delete ChangeLog files.

2013-03-08 15:55:06 -05:00

or1k

or1k: New cache manager.

2014-09-16 12:46:42 -05:00

powerpc

score: Rename _BSP_Exception_frame_print()

2014-09-11 09:10:16 +02:00

libcpu/sh: Build cache stubs so apps usign cache API link

2014-04-22 08:37:01 -05:00

shared

score: Add missing define to cache manager

2014-08-25 08:52:05 +02:00

sparc

score/sparc: Add support for paravirtualization

2014-06-03 08:35:47 +02:00

sparc64

Regenerate all preinstall.am files.

2014-08-29 12:48:01 +10:00

Makefile.am

Remove All CVS Id Strings Possible Using a Script

2012-05-11 08:44:13 -05:00

README

Remove All CVS Id Strings Possible Using a Script

2012-05-11 08:44:13 -05:00

README

This is the README file for libcpu.

This directory contains reusable libraries which are CPU dependent but not
target board dependent.  For example, the PowerPC has an on CPU decrementer
register which may be used by all PowerPC BSP's for the Clock and Timer
Drivers.

Other examples include the caching support for the m68k CPU models and
MIPS CPU model exception vectoring routines.  This level of support
will make it easier for others developing embedded applications on a given
CPU.