forked from Imagelibrary/rtems
163 lines
5.5 KiB
C
163 lines
5.5 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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* @ingroup zynq_devcfg
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* @brief Device configuration support.
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*
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* Provides support for the Zynq7000 series device configuration interface
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* controller. PCAP command sequences are written using the write interface,
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* and PCAP responses are retrieved with the read interface. The driver can be
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* used for reconfiguration of the FPGA, and also reading FPGA configuration
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* data for error checking.
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*/
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/*
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* Copyright (c) 2016
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* NSF Center for High-Performance Reconfigurable Computing (CHREC),
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* University of Florida. All rights reserved.
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* Copyright (c) 2017
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* NSF Center for High-Performance Reconfigurable Computing (CHREC),
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* University of Pittsburgh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation
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* are those of the authors and should not be interpreted as representing
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* official policies, either expressed or implied, of CHREC.
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*
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* Author: Patrick Gauvin <gauvin@hcs.ufl.edu>
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*/
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/**
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* @defgroup zynq_devcfg Device Configuration Interface Support
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* @ingroup arm_zynq
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* @brief Device Configuration Interface Support
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*/
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#ifndef LIBBSP_ARM_XILINX_ZYNQ_DEVCFG_H
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#define LIBBSP_ARM_XILINX_ZYNQ_DEVCFG_H
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#include <rtems/libio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#define ZYNQ_DEVCFG_NAME "/dev/fpga"
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/*
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* Add to CONFIGURE_APPLICATION_PREREQUISITE_DRIVERS
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*/
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#define ZYNQ_DEVCFG_DRIVER_TABLE_ENTRY \
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{ zynq_devcfg_init, zynq_devcfg_open, zynq_devcfg_close, zynq_devcfg_read, \
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zynq_devcfg_write, zynq_devcfg_control }
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/* PCAP DMA transfers must be 64-byte aligned.
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Use this to read or write an aligned buffer avoiding the
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use of the heap in the driver. */
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#define ZYNQ_DEVCFG_PCAP_DMA_ALIGN 64
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/* Configuration command words. */
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#define ZYNQ_DEVCFG_CFG_DUMMY ( 0xffffffff )
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#define ZYNQ_DEVCFG_CFG_BUS_WIDTH_SYNC ( 0x000000bb )
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#define ZYNQ_DEVCFG_CFG_BUS_WIDTH_DETECT ( 0x11220044 )
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#define ZYNQ_DEVCFG_CFG_SYNC ( 0xaa995566 )
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/** @brief Zynq configuration frame length in bytes */
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#define ZYNQ_DEVCFG_CONFIG_FRAME_LEN ( 101 * 4 )
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#define ZYNQ_DEVCFG_IOCTL_VERSION_MAX_LEN 16
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enum zynq_devcfg_ioctl {
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/** @brief Argument: Buffer for character string of at least
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* ZYNQ_DEVCFG_IOCTL_VERSION_MAX_LEN bytes.
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*/
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ZYNQ_DEVCFG_IOCTL_VERSION,
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/** @brief Argument: None. */
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ZYNQ_DEVCFG_IOCTL_FPGA_PROGRAM_PRE,
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/** @brief Argument: None. */
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ZYNQ_DEVCFG_IOCTL_FPGA_PROGRAM_POST,
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/** @brief Argument: None. */
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ZYNQ_DEVCFG_IOCTL_FPGA_PROGRAM_WAIT_DONE,
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/** @brief Argument: bool. */
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ZYNQ_DEVCFG_IOCTL_SET_SECURE,
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/** @brief Argument: bool. */
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ZYNQ_DEVCFG_IOCTL_SET_WRITE_MODE_RESTRICTED
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};
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rtems_device_driver zynq_devcfg_init(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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rtems_device_driver zynq_devcfg_open(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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rtems_device_driver zynq_devcfg_close(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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/**
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* @brief Read from the PCAP controller.
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*
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* Readback reads cannot be split into multiple DMA reads, this may cause the
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* PCAP DMA to exhibit unexpected behavior. Therefore, the read length must
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* match the preceding command sequence's expected data output length.
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*/
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rtems_device_driver zynq_devcfg_read(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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/**
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* @brief Write to the PCAP controller.
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*
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* Data format: dword aligned bistream data or PCAP commands. Bitstream data is
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* expected to be formatted as Vivado 2016.4 outputs BIN-format bitstreams by
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* default (not bit-swapped) BUT with the byte order within each dword changed
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* to little endian. See UG470 for information on data ordering.
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*/
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rtems_device_driver zynq_devcfg_write(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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rtems_device_driver zynq_devcfg_control(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *args
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);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_XILINX_ZYNQ_DEVCFG_H */
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