forked from Imagelibrary/rtems
be6e30dff3
The RTEMS Software Engineering Guide specifies that the SPDX license annotation shouldbe the first line of the file and not part of the copyright/license comment block.
98 lines
2.7 KiB
C
98 lines
2.7 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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* @ingroup RTEMSBSPsARMZynq
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* @brief Global BSP definitions.
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*/
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/*
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* Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H
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#define LIBBSP_ARM_XILINX_ZYNQ_BSP_H
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/**
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* @defgroup RTEMSBSPsARMZynq Xilinx Zynq
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*
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* @ingroup RTEMSBSPsARM
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*
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* @brief Xilinx Zynq Board Support Package.
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*
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* @{
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*/
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#include <bspopts.h>
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#define BSP_FEATURE_IRQ_EXTENSION
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#ifndef ASM
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#include <rtems.h>
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#include <bsp/default-initial-extension.h>
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#include <bsp/start.h>
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#include <dev/serial/zynq-uart-zynq.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000
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#define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100
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#define BSP_ARM_A9MPCORE_GT_BASE 0xf8f00200
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#define BSP_ARM_A9MPCORE_PT_BASE 0xf8f00600
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#define BSP_ARM_GIC_DIST_BASE 0xf8f01000
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#define BSP_ARM_L2C_310_BASE 0xf8f02000
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#define BSP_ARM_L2C_310_ID 0x410000c8
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/**
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* @brief Zynq specific set up of the MMU.
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*
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* Provide in the application to override
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* the defaults in the BSP. Note the defaults do not map in the GP0 and GP1
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* AXI ports. You should add the specific regions that map into your
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* PL rather than just open the whole of the GP[01] address space up.
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*/
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BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void);
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uint32_t zynq_clock_cpu_1x(void);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* ASM */
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/** @} */
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#endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */
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