forked from Imagelibrary/rtems
eeaef74d07
All files were written by Sebastian Huber who has previously given permission to relicense. Update #3053. Close #5318.
90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2012 Sebastian Huber
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp/rcc.h>
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#include <bsp/stm32f4.h>
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#include <rtems.h>
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static void rcc_set(
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stm32f4_rcc_index index,
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bool set,
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volatile uint32_t *regs
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)
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{
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int reg = index >> 5;
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uint32_t one = 1;
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uint32_t bit = one << (index & 0x1f);
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rtems_interrupt_level level;
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uint32_t val;
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rtems_interrupt_disable(level);
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val = regs [reg];
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if (set) {
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val |= bit;
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} else {
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val &= ~bit;
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}
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regs [reg] = val;
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rtems_interrupt_enable(level);
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}
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void stm32f4_rcc_reset(stm32f4_rcc_index index)
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{
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stm32f4_rcc_set_reset(index, true);
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stm32f4_rcc_set_reset(index, false);
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}
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void stm32f4_rcc_set_reset(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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#ifdef STM32F4_FAMILY_F4XXXX
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rcc_set(index, set, &rcc->ahbrstr [0]);
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#endif/* STM32F4_FAMILY_F4XXXX */
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#ifdef STM32F4_FAMILY_F10XXX
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/* The first register is missing for the reset-block */
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rcc_set(index, set, &rcc->cir);
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#endif /* STM32F4_FAMILY_F10XXX */
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}
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void stm32f4_rcc_set_clock(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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rcc_set(index, set, &rcc->ahbenr [0]);
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}
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#ifdef STM32F4_FAMILY_F4XXXX
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void stm32f4_rcc_set_low_power_clock(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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rcc_set(index, set, &rcc->ahblpenr [0]);
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}
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#endif /* STM32F4_FAMILY_F4XXXX */
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