forked from Imagelibrary/rtems
76 lines
2.4 KiB
C
76 lines
2.4 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RISCV_IRQ
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*
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* @brief Interrupt definitions.
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*/
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/*
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* Copyright (c) 2018 embedded brains GmbH & Co. KG
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*
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* Copyright (c) 2015 University of York.
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* Hesham Almatary <hesham@alumni.york.ac.uk>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef LIBBSP_GENERIC_RISCV_IRQ_H
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#define LIBBSP_GENERIC_RISCV_IRQ_H
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#ifndef ASM
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#include <bsp.h>
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#include <rtems/irq.h>
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#include <rtems/irq-extension.h>
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#include <rtems/score/processormask.h>
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#define RISCV_INTERRUPT_VECTOR_SOFTWARE 0
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#define RISCV_INTERRUPT_VECTOR_TIMER 1
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#define RISCV_INTERRUPT_VECTOR_EXTERNAL(x) ((x) + 2)
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#define RISCV_INTERRUPT_VECTOR_IS_EXTERNAL(x) ((x) >= 2)
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#define RISCV_INTERRUPT_VECTOR_EXTERNAL_TO_INDEX(x) ((x) - 2)
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#define BSP_INTERRUPT_VECTOR_COUNT RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
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#define BSP_INTERRUPT_CUSTOM_VALID_VECTOR
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rtems_status_code bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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const Processor_mask *affinity
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);
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rtems_status_code bsp_interrupt_get_affinity(
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rtems_vector_number vector,
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Processor_mask *affinity
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);
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#endif /* ASM */
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#endif /* LIBBSP_GENERIC_RISCV_IRQ_H */
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