forked from Imagelibrary/rtems
123 lines
3.7 KiB
Plaintext
123 lines
3.7 KiB
Plaintext
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH & Co. KG
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* FIXME: Compilation should be automated.
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*
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* Compile this file with the following commands:
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* export BSP_DIR="${RTEMS_SRC_DIR}/bsps/arm/imxrt/"
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* arm-rtems6-cpp -P -x assembler-with-cpp -I "${BSP_DIR}/include/" -include "${BSP_DIR}/dts/imxrt1050-evkb.dts" /dev/null | \
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* dtc -O dtb -o "${BSP_DIR}/dts/imxrt1050-evkb.dtb" -b 0 -p 64
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* rtems-bin2c -A 8 -C -N imxrt_dtb "${BSP_DIR}/dts/imxrt1050-evkb.dtb" "${BSP_DIR}/dts/imxrt1050-evkb.c"
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*/
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/dts-v1/;
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#include <imxrt/imxrt1050-pinfunc.h>
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#include <imxrt/imxrt1050.dtsi>
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&lpuart1 {
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pinctrl-0 = <&pinctrl_lpuart1>;
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status = "okay";
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};
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&chosen {
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stdout-path = &lpuart1;
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};
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&lpuart3 {
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pinctrl-0 = <&pinctrl_lpuart3>;
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status = "okay";
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};
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&lpspi1 {
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pinctrl-0 = <&pinctrl_lpspi1>;
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status = "okay";
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};
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&lpi2c1 {
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pinctrl-0 = <&pinctrl_lpi2c1>;
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status = "okay";
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};
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&fec1 {
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pinctrl-0 = <&pinctrl_fec1>;
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phy-reset-gpios = <&gpio1 9 1>;
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rtems,phy-interrupt-gpios = <&gpio1 10 1>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_lpuart1: lpuart1grp {
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fsl,pins = <
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IMXRT_PAD_GPIO_AD_B0_12__LPUART1_TX 0x8
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IMXRT_PAD_GPIO_AD_B0_13__LPUART1_RX 0x13000
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>;
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};
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pinctrl_lpuart3: lpuart3grp {
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fsl,pins = <
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IMXRT_PAD_GPIO_AD_B1_06__LPUART3_TX 0x8
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IMXRT_PAD_GPIO_AD_B1_07__LPUART3_RX 0x13000
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>;
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};
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pinctrl_lpspi1: lpspi1grp {
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fsl,pins = <
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IMXRT_PAD_GPIO_SD_B0_01__LPSPI1_PCS0 0x8
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IMXRT_PAD_GPIO_SD_B0_02__LPSPI1_SDO 0x8
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IMXRT_PAD_GPIO_SD_B0_03__LPSPI1_SDI 0x1b000
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IMXRT_PAD_GPIO_SD_B0_00__LPSPI1_SCK 0x8
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>;
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};
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pinctrl_lpi2c1: lpi2c1grp {
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fsl,pins = <
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IMXRT_PAD_GPIO_AD_B1_00__LPI2C1_SCL 0x4000f830
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IMXRT_PAD_GPIO_AD_B1_01__LPI2C1_SDA 0x4000f830
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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IMXRT_PAD_GPIO_EMC_41__ENET_enet_mdio 0xb829
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IMXRT_PAD_GPIO_EMC_40__ENET_enet_mdc 0xb0e9
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IMXRT_PAD_GPIO_B1_04__ENET_enet_rx_data0 0xb0e9
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IMXRT_PAD_GPIO_B1_05__ENET_enet_rx_data1 0xb0e9
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IMXRT_PAD_GPIO_B1_06__ENET_enet_rx_en 0xb0e9
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IMXRT_PAD_GPIO_B1_07__ENET_enet_tx_data0 0xb0e9
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IMXRT_PAD_GPIO_B1_08__ENET_enet_tx_data1 0xb0e9
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IMXRT_PAD_GPIO_B1_09__ENET_enet_tx_en 0xb0e9
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IMXRT_PAD_GPIO_B1_10__ENET_enet_ref_clk 0x40000031
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IMXRT_PAD_GPIO_B1_11__ENET_enet_rx_er 0xb0e9
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/* ENET_RST */
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IMXRT_PAD_GPIO_AD_B0_09__GPIO1_gpio_io09 0x810
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/* ENET_INT */
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IMXRT_PAD_GPIO_AD_B0_10__GPIO1_gpio_io10 0xb0a9
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>;
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};
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};
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