forked from Imagelibrary/rtems
119 lines
3.2 KiB
ArmAsm
119 lines
3.2 KiB
ArmAsm
/*
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* Cirrus EP7312 Startup code
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*
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* Copyright (c) 2010 embedded brains GmbH & Co. KG
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*
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* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
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*
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* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems/asm.h>
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#include <rtems/score/cpu.h>
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.section ".bsp_start_text", "ax"
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.arm
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/*******************************************************
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standard exception vectors table
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*** Must be located at address 0
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********************************************************/
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Vector_Init_Block:
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ldr pc, handler_addr_reset
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ldr pc, handler_addr_undef
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ldr pc, handler_addr_swi
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ldr pc, handler_addr_prefetch
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ldr pc, handler_addr_abort
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nop
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ldr pc, handler_addr_irq
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ldr pc, handler_addr_fiq
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handler_addr_reset:
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.word _start
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handler_addr_undef:
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.word _ARMV4_Exception_undef_default
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handler_addr_swi:
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.word _ARMV4_Exception_swi_default
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handler_addr_prefetch:
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.word _ARMV4_Exception_pref_abort_default
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handler_addr_abort:
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.word _ARMV4_Exception_data_abort_default
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handler_addr_reserved:
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.word _ARMV4_Exception_reserved_default
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handler_addr_irq:
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.word _ARMV4_Exception_interrupt
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handler_addr_fiq:
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.word _ARMV4_Exception_fiq_default
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.globl _start
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_start:
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/* Set end of interrupt stack area */
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ldr r7, =_ISR_Stack_area_end
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/* Enter FIQ mode and set up the FIQ stack pointer */
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mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
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msr cpsr, r0
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ldr r1, =bsp_stack_fiq_size
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mov sp, r7
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sub r7, r7, r1
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/* Enter ABT mode and set up the ABT stack pointer */
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mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
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msr cpsr, r0
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ldr r1, =bsp_stack_abt_size
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mov sp, r7
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sub r7, r7, r1
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/* Enter UND mode and set up the UND stack pointer */
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mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
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msr cpsr, r0
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ldr r1, =bsp_stack_und_size
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mov sp, r7
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sub r7, r7, r1
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/* Enter IRQ mode and set up the IRQ stack pointer */
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mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
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msr cpsr, r0
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mov sp, r7
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/*
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* Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
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* (interrupts are disabled).
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*/
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mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
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msr cpsr, r0
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mov sp, r7
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/* Stay in SVC mode */
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/*
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* Here is the code to initialize the low-level BSP environment
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* (Chip Select, PLL, ....?)
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*/
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/* zero the bss */
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LDR r1, =bsp_section_bss_end /* get end of ZI region */
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LDR r0, =bsp_section_bss_begin /* load base address of ZI region */
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zi_init:
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MOV r2, #0
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CMP r0, r1 /* loop whilst r0 < r1 */
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STRLOT r2, [r0], #4
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BLO zi_init
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/* --- Now we enter the C code */
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mov r0, #0
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bl boot_card
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