forked from Imagelibrary/rtems
523 lines
15 KiB
C
523 lines
15 KiB
C
/*
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* Copyright (c) 2016 Chris Johns <chrisj@rtems.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#define TARGET_DEBUG 1
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <errno.h>
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#include <inttypes.h>
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#include <stdlib.h>
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#include <rtems.h>
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#include <rtems/score/threadimpl.h>
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#include "rtems-debugger-target.h"
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#include "rtems-debugger-threads.h"
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/*
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* Hardware breakpoints. Limited by hardware
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*/
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#define RTEMS_DEBUGGER_HWBREAK_NUM 4
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/*
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* Number of registers.
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*/
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#define RTEMS_DEBUGGER_NUMREGS 16
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/*
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* Number of bytes per register.
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*/
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#define RTEMS_DEBUGGER_REG_BYTES 4
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/*
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* Debugger registers layout.
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*/
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#define REG_EAX 0
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#define REG_ECX 1
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#define REG_EDX 2
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#define REG_EBX 3
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#define REG_ESP 4
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#define REG_EBP 5
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#define REG_ESI 6
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#define REG_EDI 7
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#define REG_PC 8
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#define REG_EIP REG_PC
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#define REG_PS 9
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#define REG_EFLAGS REG_PS
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#define REG_CS 10
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#define REG_SS 11
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#define REG_DS 12
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#define REG_ES 13
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#define REG_FS 14
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#define REG_GS 15
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/**
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* Register offset table with the total as the last entry.
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*
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* Check this table in gdb with the command:
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*
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* maint print registers
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*/
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static const size_t i386_reg_offsets[RTEMS_DEBUGGER_NUMREGS + 1] =
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{
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0, /* REG_EAX 4 uint32_t */
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4, /* REG_ECX 4 uint32_t */
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8, /* REG_EDX 4 uint32_t */
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12, /* REG_EBX 4 uint32_t */
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16, /* REG_ESP 4 uint32_t */
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20, /* REG_EBP 4 uint32_t */
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24, /* REG_ESI 4 uint32_t */
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28, /* REG_EDI 4 uint32_t */
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32, /* REG_EIP 4 *1 */
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36, /* REG_EFLAGS 4 uint32_t */
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40, /* REG_CS 4 uint32_t */
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44, /* REG_SS 4 uint32_t */
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48, /* REG_DS 4 uint32_t */
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52, /* REG_ES 4 uint32_t */
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56, /* REG_FS 4 uint32_t */
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60, /* REG_GS 4 uint32_t */
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64 /* total size */
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};
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/*
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* Number of bytes of registers.
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*/
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#define RTEMS_DEBUGGER_NUMREGBYTES i386_reg_offsets[RTEMS_DEBUGGER_NUMREGS]
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/**
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* The int 3 opcode.
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*/
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#define TARGET_BKPT 0xcc
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static const uint8_t breakpoint[1] = { TARGET_BKPT };
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/*
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* Get a copy of a register.
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*/
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#define GET_REG(_r, _v) asm volatile("pushl %%" #_r "; popl %0" : "=rm" (_v))
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/*
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* A function to get a segment register.
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*/
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static inline uint32_t
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get_seg_reg(size_t reg)
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{
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int v = 0;
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switch (reg) {
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case REG_CS:
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GET_REG(CS, v);
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break;
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case REG_SS:
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GET_REG(SS, v);
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break;
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case REG_DS:
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GET_REG(DS, v);
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break;
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case REG_ES:
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GET_REG(ES, v);
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break;
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case REG_FS:
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GET_REG(FS, v);
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break;
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case REG_GS:
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GET_REG(GS, v);
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break;
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}
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return v & 0xffff;
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}
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/**
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* Target lock.
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*/
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RTEMS_INTERRUPT_LOCK_DEFINE(static, target_lock, "target_lock")
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/**
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* The orginal exception handler.
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*/
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static void (*orig_currentExcHandler)(CPU_Exception_frame* frame);
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#if TARGET_DEBUG
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#include <rtems/bspIo.h>
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static void target_printk(const char* format, ...) RTEMS_PRINTFLIKE(1, 2);
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static void
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target_printk(const char* format, ...)
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{
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va_list ap;
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va_start(ap, format);
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vprintk(format, ap);
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va_end(ap);
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}
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#else
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#define target_printk(_fmt, ...)
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#endif
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#if TODO
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/**
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* Target description.
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*/
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static const char* const target_xml =
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"<?xml version=\"1.0\"> \
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<!DOCTYPE target SYSTEM \"gdb-target.dtd\"> \
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<target version=\"1.0\"> \
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<architecture>i386</architecture> \
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<xi:include href=\"32bit-core.xml\"/> \
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<xi:include href=\"32bit-sse.xml\"/> \
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</target>";
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#endif
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int
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rtems_debugger_target_configure(rtems_debugger_target* target)
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{
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target->capabilities = (RTEMS_DEBUGGER_TARGET_CAP_SWBREAK);
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target->reg_num = RTEMS_DEBUGGER_NUMREGS;
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target->reg_offset = i386_reg_offsets;
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target->breakpoint = &breakpoint[0];
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target->breakpoint_size = sizeof(breakpoint);
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return 0;
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}
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static void
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target_exception(CPU_Exception_frame* frame)
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{
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target_printk("[} frame = %08" PRIx32 " sig=%d (%" PRIx32 ")\n",
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(uint32_t) frame,
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rtems_debugger_target_exception_to_signal(frame),
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frame->idtIndex);
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target_printk("[} EAX = %" PRIx32 " EBX = %" PRIx32 \
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" ECX = %" PRIx32 " EDX = %" PRIx32 "\n",
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frame->eax, frame->ebx, frame->ecx, frame->edx);
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target_printk("[} ESI = %" PRIx32 " EDI = %" PRIx32 \
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" EBP = %" PRIx32 " ESP = %" PRIx32 "\n",
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frame->esi, frame->edi, frame->ebp, frame->esp0);
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target_printk("[} EIP = %" PRIx32"\n", frame->eip);
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frame->eflags &= ~EFLAGS_TRAP;
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switch (rtems_debugger_target_exception(frame)) {
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case rtems_debugger_target_exc_consumed:
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default:
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break;
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case rtems_debugger_target_exc_step:
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frame->eflags |= EFLAGS_TRAP;
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break;
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case rtems_debugger_target_exc_cascade:
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orig_currentExcHandler(frame);
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break;
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}
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}
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static bool
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rtems_debugger_is_int_reg(size_t reg)
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{
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const size_t size = i386_reg_offsets[reg + 1] - i386_reg_offsets[reg];
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return size == RTEMS_DEBUGGER_REG_BYTES;
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}
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static void
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rtems_debugger_set_int_reg(rtems_debugger_thread* thread,
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size_t reg,
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const uint32_t value)
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{
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const size_t offset = i386_reg_offsets[reg];
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/*
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* Use memcpy to avoid alignment issues.
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*/
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memcpy(&thread->registers[offset], &value, sizeof(uint32_t));
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}
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static const uint32_t
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rtems_debugger_get_int_reg(rtems_debugger_thread* thread, size_t reg)
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{
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const size_t offset = i386_reg_offsets[reg];
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uint32_t value;
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memcpy(&value, &thread->registers[offset], sizeof(uint32_t));
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return value;
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}
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int
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rtems_debugger_target_enable(void)
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{
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rtems_interrupt_lock_context lock_context;
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rtems_interrupt_lock_acquire(&target_lock, &lock_context);
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if (orig_currentExcHandler == NULL) {
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orig_currentExcHandler = _currentExcHandler;
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_currentExcHandler = target_exception;
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}
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rtems_interrupt_lock_release(&target_lock, &lock_context);
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return 0;
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}
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int
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rtems_debugger_target_disable(void)
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{
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rtems_interrupt_lock_context lock_context;
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rtems_interrupt_lock_acquire(&target_lock, &lock_context);
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if (orig_currentExcHandler != NULL)
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_currentExcHandler = orig_currentExcHandler;
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rtems_interrupt_lock_release(&target_lock, &lock_context);
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return 0;
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}
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int
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rtems_debugger_target_read_regs(rtems_debugger_thread* thread)
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{
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if (!rtems_debugger_thread_flag(thread,
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RTEMS_DEBUGGER_THREAD_FLAG_REG_VALID)) {
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size_t i;
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for (i = 0; i < rtems_debugger_target_reg_num(); ++i) {
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if (rtems_debugger_is_int_reg(i))
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rtems_debugger_set_int_reg(thread, i, 0xdeaddead);
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}
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if (thread->frame) {
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CPU_Exception_frame* frame = thread->frame;
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rtems_debugger_set_int_reg(thread, REG_EAX, frame->eax);
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rtems_debugger_set_int_reg(thread, REG_ECX, frame->ecx);
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rtems_debugger_set_int_reg(thread, REG_EDX, frame->edx);
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rtems_debugger_set_int_reg(thread, REG_EBX, frame->ebx);
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rtems_debugger_set_int_reg(thread, REG_ESP, frame->esp0);
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rtems_debugger_set_int_reg(thread, REG_EBP, frame->ebp);
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rtems_debugger_set_int_reg(thread, REG_ESI, frame->esi);
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rtems_debugger_set_int_reg(thread, REG_EDI, frame->edi);
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rtems_debugger_set_int_reg(thread, REG_EIP, frame->eip);
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rtems_debugger_set_int_reg(thread, REG_EFLAGS, frame->eflags);
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rtems_debugger_set_int_reg(thread, REG_CS, frame->cs);
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/*
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* Get the signal from the frame.
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*/
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thread->signal = rtems_debugger_target_exception_to_signal(frame);
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}
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else {
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rtems_debugger_set_int_reg(thread, REG_EBX, thread->tcb->Registers.ebx);
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rtems_debugger_set_int_reg(thread, REG_ESI, thread->tcb->Registers.esi);
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rtems_debugger_set_int_reg(thread, REG_EDI, thread->tcb->Registers.edi);
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rtems_debugger_set_int_reg(thread, REG_EFLAGS, thread->tcb->Registers.eflags);
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rtems_debugger_set_int_reg(thread, REG_ESP, (intptr_t) thread->tcb->Registers.esp);
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rtems_debugger_set_int_reg(thread, REG_EBP, (intptr_t) thread->tcb->Registers.ebp);
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rtems_debugger_set_int_reg(thread, REG_EIP, *((DB_UINT*) thread->tcb->Registers.esp));
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rtems_debugger_set_int_reg(thread, REG_EAX, (intptr_t) thread);
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rtems_debugger_set_int_reg(thread, REG_CS, get_seg_reg(REG_CS));
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/*
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* Blocked threads have no signal.
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*/
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thread->signal = 0;
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}
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rtems_debugger_set_int_reg(thread, REG_SS, get_seg_reg(REG_SS));
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rtems_debugger_set_int_reg(thread, REG_DS, get_seg_reg(REG_DS));
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rtems_debugger_set_int_reg(thread, REG_ES, get_seg_reg(REG_ES));
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rtems_debugger_set_int_reg(thread, REG_FS, get_seg_reg(REG_FS));
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rtems_debugger_set_int_reg(thread, REG_GS, get_seg_reg(REG_GS));
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thread->flags |= RTEMS_DEBUGGER_THREAD_FLAG_REG_VALID;
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thread->flags &= ~RTEMS_DEBUGGER_THREAD_FLAG_REG_DIRTY;
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}
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return 0;
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}
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int
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rtems_debugger_target_write_regs(rtems_debugger_thread* thread)
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{
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if (rtems_debugger_thread_flag(thread,
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RTEMS_DEBUGGER_THREAD_FLAG_REG_DIRTY)) {
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/*
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* Only write to debugger controlled threads. Do not touch the registers
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* for threads blocked in the context switcher.
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*/
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if (rtems_debugger_thread_flag(thread,
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RTEMS_DEBUGGER_THREAD_FLAG_EXCEPTION)) {
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CPU_Exception_frame* frame = thread->frame;
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frame->eax = rtems_debugger_get_int_reg(thread, REG_EAX);
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frame->ecx = rtems_debugger_get_int_reg(thread, REG_ECX);
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frame->edx = rtems_debugger_get_int_reg(thread, REG_EDX);
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frame->ebx = rtems_debugger_get_int_reg(thread, REG_EBX);
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frame->esp0 = rtems_debugger_get_int_reg(thread, REG_ESP);
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frame->ebp = rtems_debugger_get_int_reg(thread, REG_EBP);
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frame->esi = rtems_debugger_get_int_reg(thread, REG_ESI);
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frame->edi = rtems_debugger_get_int_reg(thread, REG_EDI);
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frame->eip = rtems_debugger_get_int_reg(thread, REG_EIP);
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frame->eflags = rtems_debugger_get_int_reg(thread, REG_EFLAGS);
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frame->cs = rtems_debugger_get_int_reg(thread, REG_CS);
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}
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thread->flags &= ~RTEMS_DEBUGGER_THREAD_FLAG_REG_DIRTY;
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}
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return 0;
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}
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uintptr_t
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rtems_debugger_target_reg_pc(rtems_debugger_thread* thread)
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{
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int r;
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r = rtems_debugger_target_read_regs(thread);
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if (r >= 0) {
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return rtems_debugger_get_int_reg(thread, REG_EIP);
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}
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return 0;
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}
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uintptr_t
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rtems_debugger_target_frame_pc(CPU_Exception_frame* frame)
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{
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return (uintptr_t) frame->eip;
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}
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uintptr_t
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rtems_debugger_target_reg_sp(rtems_debugger_thread* thread)
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{
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int r;
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r = rtems_debugger_target_read_regs(thread);
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if (r >= 0) {
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return rtems_debugger_get_int_reg(thread, REG_ESP);
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}
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return 0;
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}
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uintptr_t
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rtems_debugger_target_tcb_sp(rtems_debugger_thread* thread)
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{
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return (DB_UINT) thread->tcb->Registers.esp;
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}
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int
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rtems_debugger_target_thread_stepping(rtems_debugger_thread* thread)
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{
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if (rtems_debugger_thread_flag(thread,
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(RTEMS_DEBUGGER_THREAD_FLAG_STEP |
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RTEMS_DEBUGGER_THREAD_FLAG_STEPPING))) {
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CPU_Exception_frame* frame = thread->frame;
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/*
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* Single step instructions with interrupts masked to avoid stepping into
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* an interrupt handler.
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*/
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if ((frame->eflags & EFLAGS_INTR_ENABLE) == 0)
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thread->flags |= RTEMS_DEBUGGER_THREAD_FLAG_INTS_DISABLED;
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else
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frame->eflags &= ~EFLAGS_INTR_ENABLE;
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frame->eflags |= EFLAGS_TRAP;
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}
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return 0;
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}
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int
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rtems_debugger_target_exception_to_signal(CPU_Exception_frame* frame)
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{
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int sig = RTEMS_DEBUGGER_SIGNAL_HUP;
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switch (frame->idtIndex) {
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case 1: /* debug exception */
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case 3: /* breakpoint int3 */
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sig = RTEMS_DEBUGGER_SIGNAL_TRAP;
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break;
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case 4: /* int overflow */
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case 5: /* out-of-bounds */
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sig = RTEMS_DEBUGGER_SIGNAL_URG;
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break;
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case 6: /* invalid opcode */
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sig = RTEMS_DEBUGGER_SIGNAL_ILL;
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break;
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case 8: /* double fault */
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case 16: /* fp error */
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sig = RTEMS_DEBUGGER_SIGNAL_EMT;
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break;
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case 0: /* divide by zero */
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case 7: /* FPU not avail. */
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sig = RTEMS_DEBUGGER_SIGNAL_FPE;
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break;
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case 9: /* i387 seg overr. */
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case 10: /* Invalid TSS */
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case 11: /* seg. not pres. */
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case 12: /* stack except. */
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case 13: /* general prot. */
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case 14: /* page fault */
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case 17: /* alignment check */
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sig = RTEMS_DEBUGGER_SIGNAL_SEGV;
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break;
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case 2: /* NMI */
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case 18: /* machine check */
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sig = RTEMS_DEBUGGER_SIGNAL_BUS;
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break;
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default:
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break;
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}
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return sig;
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}
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void
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rtems_debugger_target_exception_print(CPU_Exception_frame* frame)
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{
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rtems_debugger_printf(" EAX = %" PRIx32 " EBX = %" PRIx32 \
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" ECX = %" PRIx32 " EDX = %" PRIx32 "\n",
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frame->eax, frame->ebx, frame->ecx, frame->edx);
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rtems_debugger_printf(" ESI = %" PRIx32 " EDI = %" PRIx32 \
|
|
" EBP = %" PRIx32 " ESP = %" PRIx32 "\n",
|
|
frame->esi, frame->edi, frame->ebp, frame->esp0);
|
|
rtems_debugger_printf(" EIP = %" PRIx32"\n", frame->eip);
|
|
}
|
|
|
|
int
|
|
rtems_debugger_target_hwbreak_insert(void)
|
|
{
|
|
/*
|
|
* Do nothing, load on exit of the exception handler.
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
rtems_debugger_target_hwbreak_remove(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
rtems_debugger_target_hwbreak_control(rtems_debugger_target_watchpoint wp,
|
|
bool insert,
|
|
uintptr_t addr,
|
|
DB_UINT kind)
|
|
{
|
|
/*
|
|
* To do.
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
rtems_debugger_target_cache_sync(rtems_debugger_target_swbreak* swbreak)
|
|
{
|
|
/*
|
|
* Nothing to do on an i386.
|
|
*/
|
|
return 0;
|
|
}
|