forked from Imagelibrary/rtems
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/**
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* @file
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*
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* @ingroup RTEMSBSPsARMCycV
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*/
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/*
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* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems/score/smpimpl.h>
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#include <bsp/start.h>
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#include <bsp/socal/alt_rstmgr.h>
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#include <bsp/socal/alt_sysmgr.h>
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#include <bsp/socal/hps.h>
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#include <bsp/socal/socal.h>
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bool _CPU_SMP_Start_processor(uint32_t cpu_index)
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{
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bool started;
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if (cpu_index == 1) {
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alt_write_word(
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ALT_SYSMGR_ROMCODE_ADDR + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST,
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ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET((uint32_t) _start)
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);
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alt_clrbits_word(
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ALT_RSTMGR_MPUMODRST_ADDR,
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ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK
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);
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/*
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* Wait for secondary processor to complete its basic initialization so
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* that we can enable the unified L2 cache.
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*/
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started = _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
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} else {
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started = false;
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}
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return started;
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}
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