forked from Imagelibrary/rtems
2365c93745
Currently, zynq-uart code is always built and has some requirements for BSPs that use it. Instead of making all BSPs satisfy that requirement or working around it by setting defaults, this moves the zynq-uart code into its own spec build object so it can be included if needed.
89 lines
2.6 KiB
C
89 lines
2.6 KiB
C
/**
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* @file
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* @ingroup zynq_uart
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* @brief UART support.
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*/
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2013, XXX embedded brains GmbH
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_ARM_XILINX_ZYNQ_UART_H
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#define LIBBSP_ARM_XILINX_ZYNQ_UART_H
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#include <rtems/termiostypes.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @defgroup zynq_uart UART Support
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* @ingroup RTEMSBSPsARMZynq
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* @brief UART Support
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*
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* This driver operates an instance of the Cadence UART present in the
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* family of Xilinx Zynq SoCs.
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*/
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typedef struct {
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rtems_termios_device_context base;
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volatile struct zynq_uart *regs;
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bool transmitting;
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rtems_vector_number irq;
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} zynq_uart_context;
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extern const rtems_termios_device_handler zynq_uart_handler;
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#define ZYNQ_UART_DEFAULT_BAUD 115200
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void zynq_uart_initialize(rtems_termios_device_context *base);
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int zynq_uart_read_polled(rtems_termios_device_context *base);
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void zynq_uart_write_polled(
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rtems_termios_device_context *base,
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char c
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);
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/**
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* Flush TX FIFO and wait until it is empty. Used in bsp_reset.
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*/
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void zynq_uart_reset_tx_flush(zynq_uart_context *ctx);
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int zynq_cal_baud_rate(
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uint32_t baudrate,
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uint32_t* brgr,
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uint32_t* bauddiv,
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uint32_t modereg
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);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_XILINX_ZYNQ_UART_H */
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