forked from Imagelibrary/rtems
9964895866
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
81 lines
1.6 KiB
ArmAsm
81 lines
1.6 KiB
ArmAsm
/*
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* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <libcpu/powerpc-utility.h>
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#define FIRST_TLB 0
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#define SCRATCH_TLB QORIQ_TLB1_ENTRY_COUNT - 1
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.global qoriq_restart_secondary_processor
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.section ".bsp_start_text", "ax"
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qoriq_restart_secondary_processor:
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mr r14, r3
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/* Invalidate all TS1 MMU entries */
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li r3, 1
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bl qoriq_tlb1_invalidate_all_by_ts
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/* Add TS1 entry for the first 4GiB of RAM */
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li r3, SCRATCH_TLB
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li r4, FSL_EIS_MAS1_TS
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li r5, FSL_EIS_MAS2_I
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li r6, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW | FSL_EIS_MAS3_SX
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li r7, 0
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li r8, 0
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li r9, 11
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bl qoriq_tlb1_write
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bl qoriq_l1cache_invalidate
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/* Set MSR and use TS1 for address translation */
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LWI r0, QORIQ_INITIAL_MSR | MSR_IS | MSR_DS
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mtmsr r0
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isync
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/* Invalidate all TS0 MMU entries */
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li r3, 0
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bl qoriq_tlb1_invalidate_all_by_ts
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/* Add TS0 entry for the first 4GiB of RAM */
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li r3, FIRST_TLB
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li r4, 0
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li r5, FSL_EIS_MAS2_I
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li r6, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW | FSL_EIS_MAS3_SX
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li r7, 0
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li r8, 0
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li r9, 11
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bl qoriq_tlb1_write
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/* Use TS0 for address translation */
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LWI r0, QORIQ_INITIAL_MSR
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mtmsr r0
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isync
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bl qoriq_l1cache_invalidate
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/* Wait for restart request */
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li r0, 0
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.Lrestartagain:
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lwz r4, 4(r14)
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cmpw r0, r4
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beq .Lrestartagain
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isync
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mtctr r4
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lwz r3, 12(r14)
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bctr
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