forked from Imagelibrary/rtems
160 lines
4.1 KiB
C
160 lines
4.1 KiB
C
/**
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* @file
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*
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* @ingroup RTEMSBSPsPowerPCQorIQ
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*
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* @brief QorIQ clock configuration.
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*/
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/*
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* Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems/timecounter.h>
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#include <libcpu/powerpc-utility.h>
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#include <bsp.h>
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#include <bsp/qoriq.h>
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#include <bsp/irq.h>
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/* This is defined in dev/clock/clockimpl.h */
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static rtems_isr Clock_isr(void *arg);
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static struct timecounter qoriq_clock_tc;
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#ifdef QORIQ_IS_HYPERVISOR_GUEST
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#define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR
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void qoriq_decrementer_dispatch(void)
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{
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PPC_SET_SPECIAL_PURPOSE_REGISTER(BOOKE_TSR, BOOKE_TSR_DIS);
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Clock_isr(NULL);
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}
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static uint32_t qoriq_clock_get_timecount(struct timecounter *tc)
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{
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return ppc_alternate_time_base();
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}
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static void qoriq_clock_initialize(void)
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{
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uint64_t frequency = bsp_time_base_frequency;
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uint32_t us_per_tick = rtems_configuration_get_microseconds_per_tick();
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uint32_t interval = (uint32_t) ((frequency * us_per_tick) / 1000000);
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PPC_SET_SPECIAL_PURPOSE_REGISTER(BOOKE_DECAR, interval - 1);
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PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS(
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BOOKE_TCR,
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BOOKE_TCR_DIE | BOOKE_TCR_ARE
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);
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ppc_set_decrementer_register(interval - 1);
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qoriq_clock_tc.tc_get_timecount = qoriq_clock_get_timecount;
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qoriq_clock_tc.tc_counter_mask = 0xffffffff;
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qoriq_clock_tc.tc_frequency = qoriq_clock_frequency;
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qoriq_clock_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
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rtems_timecounter_install(&qoriq_clock_tc);
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}
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#else /* !QORIQ_IS_HYPERVISOR_GUEST */
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static volatile qoriq_pic_global_timer *const qoriq_clock =
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#if QORIQ_CLOCK_TIMER < 4
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&qoriq.pic.gta [QORIQ_CLOCK_TIMER];
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#else
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&qoriq.pic.gtb [QORIQ_CLOCK_TIMER - 4];
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#endif
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static volatile qoriq_pic_global_timer *const qoriq_timecounter =
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#if QORIQ_CLOCK_TIMECOUNTER < 4
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&qoriq.pic.gta [QORIQ_CLOCK_TIMECOUNTER];
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#else
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&qoriq.pic.gtb [QORIQ_CLOCK_TIMECOUNTER - 4];
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#endif
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#define CLOCK_INTERRUPT (QORIQ_IRQ_GT_BASE + QORIQ_CLOCK_TIMER)
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static void qoriq_clock_handler_install(void)
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{
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rtems_status_code sc = RTEMS_SUCCESSFUL;
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#if defined(RTEMS_MULTIPROCESSING) && !defined(RTEMS_SMP)
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{
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Processor_mask affinity;
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_Processor_mask_From_index(&affinity, ppc_processor_id());
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bsp_interrupt_set_affinity(CLOCK_INTERRUPT, &affinity);
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}
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#endif
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sc = qoriq_pic_set_priority(
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CLOCK_INTERRUPT,
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QORIQ_PIC_PRIORITY_LOWEST,
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NULL
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);
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if (sc != RTEMS_SUCCESSFUL) {
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rtems_fatal_error_occurred(0xdeadbeef);
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}
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sc = rtems_interrupt_handler_install(
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CLOCK_INTERRUPT,
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"Clock",
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RTEMS_INTERRUPT_UNIQUE,
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Clock_isr,
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NULL
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);
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if (sc != RTEMS_SUCCESSFUL) {
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rtems_fatal_error_occurred(0xdeadbeef);
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}
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}
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static uint32_t qoriq_clock_get_timecount(struct timecounter *tc)
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{
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uint32_t ccr = qoriq_timecounter->ccr;
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return GTCCR_COUNT_GET(-ccr);
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}
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static void qoriq_clock_initialize(void)
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{
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uint32_t timer_frequency = BSP_bus_frequency / 8;
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uint32_t interval = (uint32_t) (((uint64_t) timer_frequency
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* (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000);
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qoriq_clock->bcr = GTBCR_COUNT(interval);
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qoriq_timecounter->bcr = GTBCR_COUNT(0xffffffff);
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qoriq_clock_tc.tc_get_timecount = qoriq_clock_get_timecount;
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qoriq_clock_tc.tc_counter_mask = GTCCR_COUNT_GET(0xffffffff);
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qoriq_clock_tc.tc_frequency = timer_frequency;
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qoriq_clock_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
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rtems_timecounter_install(&qoriq_clock_tc);
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}
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#define Clock_driver_support_install_isr(clock_isr) \
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qoriq_clock_handler_install()
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#define Clock_driver_support_set_interrupt_affinity(online_processors) \
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bsp_interrupt_set_affinity(CLOCK_INTERRUPT, online_processors)
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#endif /* QORIQ_IS_HYPERVISOR_GUEST */
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#define Clock_driver_support_initialize_hardware() \
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qoriq_clock_initialize()
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/* Include shared source clock driver code */
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#include "../../../shared/dev/clock/clockimpl.h"
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