forked from Imagelibrary/rtems
342 lines
8.9 KiB
C
342 lines
8.9 KiB
C
/*
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* This routine does the bulk of the system initialization.
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*/
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/*
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* COPYRIGHT (c) 1989-2007.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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* Modified to support the MCP750.
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* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
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*
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* Modified to support the Synergy VGM & Motorola PowerPC boards
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* (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
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*
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* Modified to support the MVME5500 board.
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* Also, the settings of L1, L2, and L3 caches is not necessary here.
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* (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
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*/
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include <rtems/sysinit.h>
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#include <rtems/powerpc/powerpc.h>
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#include <libcpu/spr.h> /* registers.h is included here */
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#include <bsp.h>
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#include <bsp/bootcard.h>
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#include <bsp/uart.h>
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#include <bsp/pci.h>
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#include <libcpu/bat.h>
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#include <libcpu/pte121.h>
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#include <libcpu/cpuIdent.h>
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#include <bsp/vectors.h>
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#include <bsp/VME.h>
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#include <bsp/bspException.h>
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#include <rtems/bspIo.h>
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#include <rtems/counter.h>
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/*
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#define SHOW_MORE_INIT_SETTINGS
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#define SHOW_LCR1_REGISTER
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#define SHOW_LCR2_REGISTER
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#define SHOW_LCR3_REGISTER
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#define CONF_VPD
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*/
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extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
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BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
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BSP_polling_getchar_function_type BSP_poll_char = NULL;
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extern void _return_to_ppcbug(void);
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extern unsigned long __rtems_end[];
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extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
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extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
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extern void BSP_pgtbl_activate(Triv121PgTbl);
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extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
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extern void BSP_vme_config(void);
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extern unsigned char ReadConfVPD_buff(int offset);
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uint32_t bsp_clicks_per_usec;
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typedef struct CmdLineRec_ {
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unsigned long size;
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char buf[0];
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} CmdLineRec, *CmdLine;
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#define mtspr(reg, val) \
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__asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
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#define mfspr(reg) \
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( { unsigned val; \
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__asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
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val; } )
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/*
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* Copy Additional boot param passed by boot loader
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*/
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#define MAX_LOADER_ADD_PARM 80
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char loaderParam[MAX_LOADER_ADD_PARM];
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/*
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* Total memory using RESIDUAL DATA
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*/
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unsigned int BSP_mem_size;
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/*
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* PCI Bus Frequency
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*/
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unsigned int BSP_bus_frequency;
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/*
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* processor clock frequency
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*/
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unsigned int BSP_processor_frequency;
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/*
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* Time base divisior (how many tick for 1 second).
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*/
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unsigned int BSP_time_base_divisor;
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static unsigned char ConfVPD_buff[200];
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#define CMDLINE_BUF_SIZE 2048
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static char cmdline_buf[CMDLINE_BUF_SIZE];
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char *BSP_commandline_string = cmdline_buf;
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/* NOTE: we cannot simply malloc the commandline string;
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* save_boot_params() is called during a very early stage when
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* libc/malloc etc. are not yet initialized!
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*
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* Here's what we do:
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*
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* initial layout setup by the loader (preload.S):
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*
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* 0..RTEMS...__rtems_end | cmdline ....... TOP
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*
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* After the save_boot_params() routine returns, the stack area will be
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* set up (start.S):
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*
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* 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
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*
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* initialize_executive_early() [called from boot_card()]
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* will initialize the workspace:
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*
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* 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
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*
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* and later calls our bsp_predriver_hook() which ends up initializing
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* libc which in turn initializes the heap
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*
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* 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
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*
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* The idea here is to first move the commandline to the future 'heap' area
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* from where it will be picked up by our bsp_predriver_hook().
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* bsp_predriver_hook() then moves it either to INIT_STACK or the workspace
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* area using proper allocation, initializes libc and finally moves
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* the data to the environment / malloced areas...
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*/
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/* this routine is called early at shared/start/start.S
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* and must be safe with a not properly aligned stack
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*/
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char *
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save_boot_params(
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void *r3,
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void *r4,
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void* r5,
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char *cmdline_start,
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char *cmdline_end
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)
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{
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int i=cmdline_end-cmdline_start;
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if ( i >= CMDLINE_BUF_SIZE )
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i = CMDLINE_BUF_SIZE-1;
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else if ( i < 0 )
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i = 0;
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memmove(cmdline_buf, cmdline_start, i);
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cmdline_buf[i]=0;
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return cmdline_buf;
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}
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uint32_t _CPU_Counter_frequency(void)
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{
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return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
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}
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void bsp_start( void )
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{
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#ifdef CONF_VPD
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int i;
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#endif
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#ifdef SHOW_LCR1_REGISTER
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unsigned l1cr;
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#endif
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#ifdef SHOW_LCR2_REGISTER
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unsigned l2cr;
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#endif
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#ifdef SHOW_LCR3_REGISTER
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unsigned l3cr;
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#endif
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Triv121PgTbl pt=0;
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/* Till Straumann: 4/2005
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* Need to map the system registers early, so we can printk...
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* (otherwise we silently die)
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*/
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/*
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* Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
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*/
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setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
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/* Till Straumann: 2004
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* map the PCI 0, 1 Domain I/O space, GT64260B registers
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* and the reserved area so that the size is the power of 2.
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* 2009 : map the entire 256 M space
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*
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*/
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setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
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/*
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* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
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* function store the result in global variables so that it can be used later.
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*/
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get_ppc_cpu_type();
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get_ppc_cpu_revision();
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#ifdef SHOW_LCR1_REGISTER
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l1cr = get_L1CR();
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printk("Initial L1CR value = %x\n", l1cr);
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#endif
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ppc_exc_initialize();
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/*
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* Init MMU block address translation to enable hardware
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* access
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* More PCI1 memory mapping to be done after BSP_pgtbl_activate.
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*/
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printk("-----------------------------------------\n");
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printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
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printk("-----------------------------------------\n");
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BSP_mem_size = probeMemoryEnd();
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/* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
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* of System Status register
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*/
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/* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
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BSP_bus_frequency = 133333333;
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BSP_processor_frequency = 1000000000;
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/* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
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BSP_time_base_divisor = 4000;
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/* Maybe not setup yet becuase of the warning message */
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/* Allocate and set up the page table mappings
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* This is only available on >604 CPUs.
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*
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* NOTE: This setup routine may modify the available memory
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* size. It is essential to call it before
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* calculating the workspace etc.
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*/
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pt = BSP_pgtbl_setup(&BSP_mem_size);
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if (!pt)
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printk("WARNING: unable to setup page tables.\n");
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printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
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/* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
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bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
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/*
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* Initalize RTEMS IRQ system
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*/
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BSP_rtems_irq_mng_init(0);
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#ifdef SHOW_LCR2_REGISTER
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l2cr = get_L2CR();
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printk("Initial L2CR value = %x\n", l2cr);
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#endif
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#ifdef SHOW_LCR3_REGISTER
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/* L3CR needs DEC int. handler installed for bsp_delay()*/
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l3cr = get_L3CR();
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printk("Initial L3CR value = %x\n", l3cr);
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#endif
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/* Activate the page table mappings only after
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* initializing interrupts because the irq_mng_init()
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* routine needs to modify the text
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*/
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if (pt) {
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Page table setup finished; will activate it NOW...\n");
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#endif
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BSP_pgtbl_activate(pt);
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}
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/* Read Configuration Vital Product Data (VPD) */
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if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
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printk("I2Cread_eeprom() error \n");
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else {
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#ifdef CONF_VPD
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printk("\n");
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for (i=0; i<150; i++) {
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printk("%2x ", ConfVPD_buff[i]);
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if ((i % 20)==0 ) printk("\n");
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}
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printk("\n");
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#endif
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}
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/*
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* PCI 1 domain memory space
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*/
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setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Going to start PCI buses scanning and initialization\n");
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#endif
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pci_initialize();
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Number of PCI buses found is : %d\n", pci_bus_count());
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#endif
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/* Install our own exception handler (needs PCI) */
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globalExceptHdl = BSP_exceptionHandler;
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/* clear hostbridge errors. MCP signal is not used on the MVME5500
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* PCI config space scanning code will trip otherwise :-(
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*/
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_BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("MSR %x \n", _read_MSR());
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printk("Exit from bspstart\n");
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#endif
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}
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unsigned char ReadConfVPD_buff(int offset)
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{
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return(ConfVPD_buff[offset]);
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}
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RTEMS_SYSINIT_ITEM(
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BSP_vme_config,
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RTEMS_SYSINIT_BSP_PRE_DRIVERS,
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RTEMS_SYSINIT_ORDER_MIDDLE
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);
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