forked from Imagelibrary/rtems
478 lines
14 KiB
C
478 lines
14 KiB
C
/*
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* This file was brought over from FreeBSD for the PCI device table.
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* The code for using the table is RTEMS specific is also under the
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* FreeBSD license.
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*
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* COPYRIGHT (c) 1989-2012.
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* On-Line Applications Research Corporation (OAR).
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*/
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/*-
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* Copyright (c) 2006 Marcel Moolenaar
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* Copyright (c) 2001 M. Warner Losh
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef __rtems__
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#include <stddef.h>
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#include <stdint.h>
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#include <i386_io.h>
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#else
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_bus.h>
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#endif
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#define DEFAULT_RCLK 1843200
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#ifndef __rtems__
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static int uart_pci_probe(device_t dev);
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static device_method_t uart_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, uart_pci_probe),
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DEVMETHOD(device_attach, uart_bus_attach),
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DEVMETHOD(device_detach, uart_bus_detach),
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DEVMETHOD(device_resume, uart_bus_resume),
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DEVMETHOD_END
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};
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static driver_t uart_pci_driver = {
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uart_driver_name,
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uart_pci_methods,
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sizeof(struct uart_softc),
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};
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#endif
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struct pci_id {
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uint16_t vendor;
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uint16_t device;
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uint16_t subven;
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uint16_t subdev;
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const char *desc;
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int rid;
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int rclk;
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int regshft;
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};
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static const struct pci_id pci_ns8250_ids[] = {
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{ 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
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128 * DEFAULT_RCLK },
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{ 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
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128 * DEFAULT_RCLK },
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{ 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
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{ 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
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{ 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
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0x10 },
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{ 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
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{ 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
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{ 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
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{ 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
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{ 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
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{ 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
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{ 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
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{ 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
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{ 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
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{ 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
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{ 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
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{ 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
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{ 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
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{ 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
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{ 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
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{ 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
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0x18 },
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{ 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
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{ 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
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{ 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
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{ 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
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0x10, 16384000 },
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{ 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
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0x10 },
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{ 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
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{ 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
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{ 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
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{ 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 0x10 },
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{ 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
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{ 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
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{ 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
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{ 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
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0x10 },
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{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
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{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
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{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
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{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
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{ 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
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{ 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
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{ 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
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{ 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
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{ 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
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{ 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
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{ 0x9710, 0x9900, 0xa000, 0x1000,
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"MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9901, 0xa000, 0x1000,
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"MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9904, 0xa000, 0x1000,
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"MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9922, 0xa000, 0x1000,
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"MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
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{ 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
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{ 0xffff, 0, 0xffff, 0, NULL, 0, 0}
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};
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#ifndef __rtems__
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const static struct pci_id *
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uart_pci_match(device_t dev, const struct pci_id *id)
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{
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uint16_t device, subdev, subven, vendor;
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vendor = pci_get_vendor(dev);
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device = pci_get_device(dev);
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while (id->vendor != 0xffff &&
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(id->vendor != vendor || id->device != device))
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id++;
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if (id->vendor == 0xffff)
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return (NULL);
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if (id->subven == 0xffff)
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return (id);
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subven = pci_get_subvendor(dev);
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subdev = pci_get_subdevice(dev);
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while (id->vendor == vendor && id->device == device &&
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(id->subven != subven || id->subdev != subdev))
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id++;
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return ((id->vendor == vendor && id->device == device) ? id : NULL);
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}
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static int
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uart_pci_probe(device_t dev)
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{
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struct uart_softc *sc;
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const struct pci_id *id;
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int result;
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sc = device_get_softc(dev);
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id = uart_pci_match(dev, pci_ns8250_ids);
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if (id != NULL) {
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sc->sc_class = &uart_ns8250_class;
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goto match;
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}
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/* Add checks for non-ns8250 IDs here. */
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return (ENXIO);
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match:
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result = uart_bus_probe(dev, id->regshft, id->rclk, id->rid, 0);
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/* Bail out on error. */
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if (result > 0)
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return (result);
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/* Set/override the device description. */
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if (id->desc)
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device_set_desc(dev, id->desc);
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return (result);
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}
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DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL);
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#endif
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#ifdef __rtems__
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#include <bsp.h>
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#include <bsp/bspimpl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <libchip/serial.h>
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#include <libchip/ns16550.h>
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#include <rtems/bspIo.h>
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#include <rtems/pci.h>
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#include "../../shared/dev/serial/legacy-console.h"
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#define MAX_BOARDS 4
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/*
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* Information saved from PCI scan
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*/
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typedef struct {
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bool found;
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const char* desc;
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uint32_t base;
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uint8_t irq;
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uint8_t bus;
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uint8_t slot;
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int ports;
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uint32_t clock;
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} port_instance_conf_t;
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/*
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* Memory Mapped Register Access Routines
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*/
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#define UART_PCI_IO (0)
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static uint8_t pci_ns16550_mem_get_register(uint32_t addr, uint8_t i)
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{
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uint8_t val = 0;
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volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4));
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val = *reg;
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if (UART_PCI_IO)
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printk( "RD(%p -> 0x%02x) ", reg, val );
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return val;
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}
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static void pci_ns16550_mem_set_register(uint32_t addr, uint8_t i, uint8_t val)
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{
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volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4));
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if (UART_PCI_IO)
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printk( "WR(%p <- 0x%02x) ", reg, val );
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*reg = val;
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}
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/*
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* IO Register Access Routines
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*/
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static uint8_t pci_ns16550_io_get_register(uint32_t addr, uint8_t i)
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{
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uint8_t val = rtems_inb(addr + i);
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if (UART_PCI_IO)
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printk( "RD(%p -> 0x%02x) ", (void*) addr + i, val );
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return val;
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}
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static void pci_ns16550_io_set_register(uint32_t addr, uint8_t i, uint8_t val)
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{
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if (UART_PCI_IO)
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printk( "WR(%p <- 0x%02x) ", (void*) addr + i, val );
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rtems_outb(addr + i, val);
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}
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void pci_uart_probe(void)
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{
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port_instance_conf_t conf[MAX_BOARDS];
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int boards = 0;
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int b = 0;
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console_tbl *ports;
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console_tbl *port_p;
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int bus;
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int dev;
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int fun;
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int status;
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int instance;
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int i;
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int total_ports = 0;
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for ( b=0 ; b<MAX_BOARDS ; b++ ) {
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conf[b].found = false;
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}
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/*
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* Scan for Serial port boards
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*/
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for ( instance=0 ; instance < MAX_BOARDS ; instance++ ) {
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for ( i=0 ; pci_ns8250_ids[i].vendor != 0xffff ; i++ ) {
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if ( pci_ns8250_ids[i].vendor == 0xffff ) {
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break;
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}
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/*
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printk("Looking for 0x%04x:0x%04x\n",
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pci_ns8250_ids[i].vendor,
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pci_ns8250_ids[i].device);
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*/
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status = pci_find_device(
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pci_ns8250_ids[i].vendor,
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pci_ns8250_ids[i].device,
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instance,
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&bus,
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&dev,
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&fun
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);
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if ( status == PCIB_ERR_SUCCESS ) {
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uint8_t irq;
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uint32_t base;
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bool io;
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pci_read_config_dword( bus, dev, fun, PCI_BASE_ADDRESS_0, &base );
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/*
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* Reject memory mapped 64-bit boards. We need 2 BAR registers and the
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* driver's base field is only 32-bits any way.
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*/
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io = (base & 1) == 1;
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if (io || (!io && (((base >> 1) & 3) != 2))) {
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boards++;
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conf[instance].found = true;
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conf[instance].desc = pci_ns8250_ids[i].desc;
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conf[instance].clock = pci_ns8250_ids[i].rclk;
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conf[instance].ports = 1;
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total_ports += conf[instance].ports;
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pci_read_config_byte( bus, dev, fun, PCI_INTERRUPT_LINE, &irq );
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conf[instance].irq = irq;
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conf[instance].base = base;
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}
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}
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}
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}
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/*
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* Now allocate array of device structures and fill them in
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*/
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if (boards) {
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int device_instance;
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ports = calloc( total_ports, sizeof( console_tbl ) );
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if (ports != NULL) {
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port_p = ports;
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device_instance = 1;
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for (b = 0; b < MAX_BOARDS; b++) {
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uint32_t base = 0;
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bool io;
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const char* locatable = "";
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const char* prefectable = locatable;
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char name[32];
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if ( conf[b].found == false )
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continue;
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sprintf( name, "/dev/pcicom%d", device_instance++ );
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port_p->sDeviceName = strdup( name );
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port_p->deviceType = SERIAL_NS16550;
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if ( conf[b].irq <= 15 ) {
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port_p->pDeviceFns = &ns16550_fns;
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} else {
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printk(
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"%s IRQ=%d >= 16 requires APIC support, using polling\n",
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name,
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conf[b].irq
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);
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port_p->pDeviceFns = &ns16550_fns_polled;
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}
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/*
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* PCI BAR (http://wiki.osdev.org/PCI#Base_Address_Registers):
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*
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* Bit 0: 0 = memory, 1 = IO
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*
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* Memory:
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* Bit 2-1 : 0 = any 32bit address,
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* 1 = < 1M
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* 2 = any 64bit address
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* Bit 3 : 0 = no, 1 = yes
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* Bit 31-4 : base address (16-byte aligned)
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*
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* IO:
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* Bit 1 : reserved
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* Bit 31-2 : base address (4-byte aligned)
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*/
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io = (conf[b].base & 1) == 1;
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if (io) {
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base = conf[b].base & 0xfffffffc;
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} else {
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int loc = (conf[b].base >> 1) & 3;
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if (loc == 0) {
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base = conf[b].base & 0xfffffff0;
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locatable = ",A32";
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} else if (loc == 1) {
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base = conf[b].base & 0x0000fff0;
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locatable = ",A16";
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}
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prefectable = (conf[b].base & (1 << 3)) == 0 ? ",no-prefech" : ",prefetch";
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}
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port_p->deviceProbe = NULL;
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port_p->pDeviceFlow = NULL;
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port_p->ulMargin = 16;
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port_p->ulHysteresis = 8;
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port_p->pDeviceParams = (void *) 9600;
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port_p->ulCtrlPort1 = base;
|
|
port_p->ulCtrlPort2 = 0; /* NA */
|
|
port_p->ulDataPort = 0; /* NA */
|
|
if (io) {
|
|
port_p->getRegister = pci_ns16550_io_get_register;
|
|
port_p->setRegister = pci_ns16550_io_set_register;
|
|
} else {
|
|
port_p->getRegister = pci_ns16550_mem_get_register;
|
|
port_p->setRegister = pci_ns16550_mem_set_register;
|
|
}
|
|
port_p->getData = NULL; /* NA */
|
|
port_p->setData = NULL; /* NA */
|
|
port_p->ulClock = conf[b].clock;
|
|
port_p->ulIntVector = conf[b].irq;
|
|
|
|
|
|
printk(
|
|
"%s:%d:%s,%s:0x%lx%s%s,irq:%d,clk:%lu\n", /* */
|
|
name, b, conf[b].desc,
|
|
io ? "io" : "mem", base, locatable, prefectable,
|
|
conf[b].irq, conf[b].clock
|
|
);
|
|
|
|
|
|
port_p++;
|
|
} /* end boards */
|
|
|
|
/*
|
|
* Register the devices
|
|
*/
|
|
console_register_devices( ports, total_ports );
|
|
|
|
/*
|
|
* Do not free the ports memory, the console hold this memory for-ever.
|
|
*/
|
|
}
|
|
}
|
|
}
|
|
#endif
|