forked from Imagelibrary/rtems
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
/**
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* @file
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*
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* @ingroup RTEMSBSPsARMTMS570
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*
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* @brief Initialization of external memory/SDRAM interface.
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*/
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#include <stdint.h>
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#include <bsp/tms570.h>
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#include <bsp/tms570_hwinit.h>
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void tms570_emif_sdram_init( void )
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{
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uint32_t dummy;
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uint32_t sdtimr = 0;
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uint32_t sdcr = 0;
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/* Do not run attempt to initialize SDRAM when code is running from it */
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if ( ( (void*)tms570_emif_sdram_init >= (void*)TMS570_SDRAM_START_PTR ) &&
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( (void*)tms570_emif_sdram_init <= (void*)TMS570_SDRAM_WINDOW_END_PTR ) )
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return;
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sdtimr = TMS570_EMIF_SDTIMR_T_RFC_SET( sdtimr, 6 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_RP_SET( sdtimr, 2 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_RCD_SET( sdtimr, 2 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_WR_SET( sdtimr, 2 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_RAS_SET( sdtimr, 4 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_RC_SET( sdtimr, 6 - 1 );
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sdtimr = TMS570_EMIF_SDTIMR_T_RRD_SET( sdtimr, 2 - 1 );
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TMS570_EMIF.SDTIMR = sdtimr;
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/* Minimum number of ECLKOUT cycles from Self-Refresh exit to any command */
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TMS570_EMIF.SDSRETR = 5;
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/* Define the SDRAM refresh period in terms of EMIF_CLK cycles. */
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TMS570_EMIF.SDRCR = 2000;
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/* SR - Self-Refresh mode bit. */
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sdcr |= TMS570_EMIF_SDCR_SR * 0;
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/* field: PD - Power Down bit controls entering and exiting of the power-down mode. */
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sdcr |= TMS570_EMIF_SDCR_PD * 0;
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/* PDWR - Perform refreshes during power down. */
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sdcr |= TMS570_EMIF_SDCR_PDWR * 0;
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/* NM - Narrow mode bit defines whether SDRAM is 16- or 32-bit-wide */
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sdcr |= TMS570_EMIF_SDCR_NM * 1;
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/* CL - CAS Latency. */
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sdcr = TMS570_EMIF_SDCR_CL_SET( sdcr, 2 );
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/* CL can only be written if BIT11_9LOCK is simultaneously written with a 1. */
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sdcr |= TMS570_EMIF_SDCR_BIT11_9LOCK * 1;
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/* IBANK - Internal SDRAM Bank size. */
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sdcr = TMS570_EMIF_SDCR_IBANK_SET( sdcr, 2 ); /* 4-banks device */
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/* Page Size. This field defines the internal page size of connected SDRAM devices. */
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sdcr = TMS570_EMIF_SDCR_PAGESIZE_SET( sdcr, 0 ); /* elements_256 */
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TMS570_EMIF.SDCR = sdcr;
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dummy = *(volatile uint32_t*)TMS570_SDRAM_START_PTR;
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(void) dummy;
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TMS570_EMIF.SDRCR = 31;
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/* Define the SDRAM refresh period in terms of EMIF_CLK cycles. */
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TMS570_EMIF.SDRCR = 312;
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}
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