forked from Imagelibrary/rtems
99 lines
2.7 KiB
C
99 lines
2.7 KiB
C
/* irq.h
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*
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* Copyright (c) 2010 embedded brains GmbH.
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*
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* CopyRight (C) 2000 Canon Research France SA.
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* Emmanuel Raguet, mailto:raguet@crf.canon.fr
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*
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* Common file, merged from s3c2400/irq/irq.h and s3c2410/irq/irq.h
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*/
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#ifndef _IRQ_H_
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#define _IRQ_H_
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#include <rtems.h>
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#include <rtems/irq.h>
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#include <rtems/irq-extension.h>
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#include <s3c24xx.h>
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#ifdef CPU_S3C2400
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/* possible interrupt sources */
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#define BSP_EINT0 0
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#define BSP_EINT1 1
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#define BSP_EINT2 2
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#define BSP_EINT3 3
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#define BSP_EINT4 4
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#define BSP_EINT5 5
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#define BSP_EINT6 6
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#define BSP_EINT7 7
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#define BSP_INT_TICK 8
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#define BSP_INT_WDT 9
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#define BSP_INT_TIMER0 10
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#define BSP_INT_TIMER1 11
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#define BSP_INT_TIMER2 12
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#define BSP_INT_TIMER3 13
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#define BSP_INT_TIMER4 14
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#define BSP_INT_UERR01 15
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#define _res0 16
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#define BSP_INT_DMA0 17
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#define BSP_INT_DMA1 18
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#define BSP_INT_DMA2 19
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#define BSP_INT_DMA3 20
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#define BSP_INT_MMC 21
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#define BSP_INT_SPI 22
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#define BSP_INT_URXD0 23
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#define BSP_INT_URXD1 24
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#define BSP_INT_USBD 25
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#define BSP_INT_USBH 26
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#define BSP_INT_IIC 27
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#define BSP_INT_UTXD0 28
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#define BSP_INT_UTXD1 29
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#define BSP_INT_RTC 30
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#define BSP_INT_ADC 31
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#define BSP_MAX_INT 32
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#elif defined CPU_S3C2410
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/* possible interrupt sources */
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#define BSP_EINT0 0
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#define BSP_EINT1 1
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#define BSP_EINT2 2
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#define BSP_EINT3 3
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#define BSP_EINT4_7 4
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#define BSP_EINT8_23 5
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#define BSP_nBATT_FLT 7
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#define BSP_INT_TICK 8
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#define BSP_INT_WDT 9
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#define BSP_INT_TIMER0 10
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#define BSP_INT_TIMER1 11
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#define BSP_INT_TIMER2 12
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#define BSP_INT_TIMER3 13
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#define BSP_INT_TIMER4 14
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#define BSP_INT_UART2 15
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#define BSP_INT_LCD 16
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#define BSP_INT_DMA0 17
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#define BSP_INT_DMA1 18
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#define BSP_INT_DMA2 19
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#define BSP_INT_DMA3 20
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#define BSP_INT_SDI 21
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#define BSP_INT_SPI0 22
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#define BSP_INT_UART1 23
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#define BSP_INT_USBD 25
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#define BSP_INT_USBH 26
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#define BSP_INT_IIC 27
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#define BSP_INT_UART0 28
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#define BSP_INT_SPI1 29
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#define BSP_INT_RTC 30
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#define BSP_INT_ADC 31
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#define BSP_MAX_INT 32
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#else
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#error "Undefined Samsung CPU model"
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#endif
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#define BSP_INTERRUPT_VECTOR_MIN 0
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#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1)
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#endif /* _IRQ_H_ */
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/* end of include file */
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