forked from Imagelibrary/rtems
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
116 lines
2.4 KiB
C
116 lines
2.4 KiB
C
/*
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* Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp/syscon.h>
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#include <bsp/lm3s69xx.h>
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#include <rtems.h>
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static void delay_3_clocks(void)
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{
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asm volatile(
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"nop\n\t"
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"nop\n\t"
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"nop");
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}
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void __attribute__((naked)) lm3s69xx_syscon_delay_3x_clocks(unsigned long x_count)
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{
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asm volatile(
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"subs r0, #1\n\t"
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"bne lm3s69xx_syscon_delay_3x_clocks\n\t"
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"bx lr"
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);
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}
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void lm3s69xx_syscon_enable_gpio_clock(unsigned int port, bool enable)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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uint32_t mask = 1 << port;
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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if (enable)
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syscon->rcgc2 |= mask;
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else
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syscon->rcgc2 &= ~mask;
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delay_3_clocks();
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rtems_interrupt_enable(level);
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}
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void lm3s69xx_syscon_enable_uart_clock(unsigned int port, bool enable)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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uint32_t mask = 1 << port;
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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if (enable)
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syscon->rcgc1 |= mask;
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else
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syscon->rcgc1 &= ~mask;
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delay_3_clocks();
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rtems_interrupt_enable(level);
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}
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void lm3s69xx_syscon_enable_ssi_clock(unsigned int port, bool enable)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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uint32_t mask = 1 << (port + 4);
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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if (enable)
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syscon->rcgc1 |= mask;
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else
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syscon->rcgc1 &= ~mask;
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delay_3_clocks();
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rtems_interrupt_enable(level);
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}
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void lm3s69xx_syscon_enable_pwm_clock(bool enable)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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if (enable)
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syscon->rcgc0 |= SYSCONRCGC0_PWM;
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else
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syscon->rcgc0 &= ~SYSCONRCGC0_PWM;
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delay_3_clocks();
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rtems_interrupt_enable(level);
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}
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/**
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* Sets PWMDIV field in the RCC register.
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*
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* @note div should be one of SCRCC_PWMDIV_DIV?_VAL constants.
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*/
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void lm3s69xx_syscon_set_pwmdiv(unsigned int div)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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syscon->rcc = (syscon->rcc & ~SYSCONRCC_PWMDIV_MSK) | SYSCONRCC_PWMDIV(div)
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| SYSCONRCC_USEPWMDIV;
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rtems_interrupt_enable(level);
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}
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