forked from Imagelibrary/rtems
9964895866
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
156 lines
4.3 KiB
C
156 lines
4.3 KiB
C
/*
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* This routine does the bulk of the system initialization.
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*/
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/*
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* Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp.h>
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#include <bspopts.h>
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#include <bsp/bootcard.h>
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#include <bsp/irq-generic.h>
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#include <bsp/lm3s69xx.h>
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#include <bsp/io.h>
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#include <bsp/syscon.h>
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#include <assert.h>
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static void init_main_osc(void)
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{
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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uint32_t sysdiv_val = LM3S69XX_PLL_FREQUENCY / LM3S69XX_SYSTEM_CLOCK;
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#if defined(LM3S69XX_MCU_LM3S6965) || defined(LM3S69XX_MCU_LM3S3749)
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assert(sysdiv_val * LM3S69XX_SYSTEM_CLOCK == LM3S69XX_PLL_FREQUENCY);
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#endif
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assert((sysdiv_val >= 4) && (sysdiv_val <= 16));
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uint32_t rcc = syscon->rcc;
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uint32_t rcc2 = syscon->rcc2;
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rcc = (rcc & ~SYSCONRCC_USESYSDIV) | SYSCONRCC_BYPASS;
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rcc2 |= SYSCONRCC2_BYPASS2;
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syscon->rcc = rcc;
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syscon->rcc2 = rcc2;
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/*
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As per a note in Stellaris® LM4F120H5QR Microcontroller Data
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Sheet on page 219: "When transitioning the system clock
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configuration to use the MOSC as the fundamental clock source, the
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MOSCDIS bit must be set prior to reselecting the MOSC or an
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undefined system clock configuration can sporadically occur."
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*/
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rcc |= SYSCONRCC_MOSCDIS;
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syscon->rcc = rcc;
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rcc = (rcc & ~(SYSCONRCC_XTAL_MSK))
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| SYSCONRCC_XTAL(LM3S69XX_XTAL_CONFIG);
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rcc2 = (rcc2 & ~(SYSCONRCC2_PWRDN2 | SYSCONRCC2_OSCSRC2_MSK))
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| SYSCONRCC2_USERCC2 | SYSCONRCC2_OSCSRC2(0x0);
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/* clear PLL lock interrupt */
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syscon->misc &= (SYSCONMISC_PLLLMIS);
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syscon->rcc = rcc;
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syscon->rcc2 = rcc2;
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lm3s69xx_syscon_delay_3x_clocks(16);
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/* since now, we'll use only RCC2 as SYSCONRCC2_USERCC2 and XTAL
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(only available in RCC) are already set */
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if (sysdiv_val % 2 == 0) {
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rcc2 = (rcc2 & ~SYSCONRCC2_SYSDIV2_MSK) | SYSCONRCC2_SYSDIV2(sysdiv_val / 2 - 1);
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rcc2 &= ~(SYSCONRCC2_DIV400);
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}
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else {
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/* need to use DIV400 */
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rcc2 = (rcc2 & ~SYSCONRCC2_SYSDIV2EXT_MSK) | SYSCONRCC2_SYSDIV2EXT(sysdiv_val - 1)
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| SYSCONRCC2_DIV400;
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}
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syscon->rcc2 = rcc2;
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while ((syscon->ris & SYSCONRIS_PLLLRIS) == 0)
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/* Wait for PLL lock */;
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rcc2 &= ~(SYSCONRCC2_BYPASS2);
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syscon->rcc2 = rcc2;
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lm3s69xx_syscon_delay_3x_clocks(16);
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}
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static const lm3s69xx_gpio_config start_config_gpio[] = {
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#ifdef LM3S69XX_ENABLE_UART_0
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#if defined(LM3S69XX_MCU_LM3S3749) || defined(LM3S69XX_MCU_LM3S6965) || defined(LM3S69XX_MCU_LM4F120)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_A, 0),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_A, 1),
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#else
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#error No GPIO pin configuration for UART 0
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#endif
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#endif /* LM3S69XX_ENABLE_UART_0 */
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#ifdef LM3S69XX_ENABLE_UART_1
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#if defined(LM3S69XX_MCU_LM3S3749)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_B, 0),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_B, 1),
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#elif defined(LM3S69XX_MCU_LM3S6965)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_D, 2),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_D, 3),
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#elif defined(LM3S69XX_MCU_LM4F120)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_B, 0),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_B, 1),
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LM3S69XX_PIN_UART_RTS(LM3S69XX_PORT_C, 4),
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LM3S69XX_PIN_UART_CTS(LM3S69XX_PORT_C, 5),
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#else
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#error No GPIO pin configuration for UART 1
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#endif
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#endif /* LM3S69XX_ENABLE_UART_1 */
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#ifdef LM3S69XX_ENABLE_UART_2
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#if defined(LM3S69XX_MCU_LM3S3749)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_D, 0),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_D, 1),
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#elif defined(LM3S69XX_MCU_LM3S6965)
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LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_G, 0),
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LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_G, 1),
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#else
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#error No GPIO pin configuration for UART 2
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#endif
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#endif /* LM3S69XX_ENABLE_UART_2 */
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};
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static void init_gpio(void)
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{
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#if LM3S69XX_USE_AHB_FOR_GPIO
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volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
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syscon->gpiohbctl |= SYSCONGPIOHBCTL_PORTA | SYSCONGPIOHBCTL_PORTB
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| SYSCONGPIOHBCTL_PORTC | SYSCONGPIOHBCTL_PORTD
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| SYSCONGPIOHBCTL_PORTE | SYSCONGPIOHBCTL_PORTF
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#if LM3S69XX_NUM_GPIO_BLOCKS > 6
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| SYSCONGPIOHBCTL_PORTG
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#if LM3S69XX_NUM_GPIO_BLOCKS > 7
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| SYSCONGPIOHBCTL_PORTH
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#endif
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#endif
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;
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#endif /* LM3S69XX_USE_AHB_FOR_GPIO */
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lm3s69xx_gpio_set_config_array(start_config_gpio,
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sizeof(start_config_gpio) / sizeof(start_config_gpio[0]));
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}
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void bsp_start(void)
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{
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init_main_osc();
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init_gpio();
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bsp_interrupt_initialize();
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}
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