forked from Imagelibrary/rtems
156 lines
4.3 KiB
C
156 lines
4.3 KiB
C
/**
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* @file
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*
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* @ingroup mpc55xx
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*
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* @brief Documentation for this file
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*/
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/*
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* Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*/
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/**
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* @defgroup mpc55xx BSP for MPC55xx boards
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*/
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/**
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* @defgroup mpc55xx_config Configuration files
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*
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* @ingroup mpc55xx
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*
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* Makefiles, configure scripts etc.
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*/
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/**
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* @page mpc55xx_ext_doc External Documentation
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*
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* @section mpc55xx_ext_doc_mpc5567rm_1 MPC5567 Microcontroller Reference Manual (Rev. 1, January 2007, Volume 1 of 2)
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* @section mpc55xx_ext_doc_mpc5567rm_2 MPC5567 Microcontroller Reference Manual (Rev. 1, January 2007, Volume 2 of 2)
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*/
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#ifndef LIBCPU_POWERPC_MPC55XX_H
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#define LIBCPU_POWERPC_MPC55XX_H
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#include <mpc55xx/regs.h>
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#include <mpc55xx/regs-mmu.h>
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#include <libcpu/powerpc-utility.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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int mpc55xx_flash_copy(void *dest, const void *src, size_t nbytes);
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int mpc55xx_flash_copy_op(void *rdest, const void *src, size_t nbytes,
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uint32_t opmask, uint32_t *p_fail_addr);
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int mpc55xx_flash_size(uint32_t *p_size);
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int mpc55xx_flash_writable(void);
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uint32_t mpc55xx_flash_address(void);
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void mpc55xx_flash_set_read_only(void);
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void mpc55xx_flash_set_read_write(void);
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int mpc55xx_physical_address(const void *addr, uint32_t *p_result);
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int mpc55xx_mapped_address(const void *addr, uint32_t *p_result);
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/* Bits for opmask. */
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#define MPC55XX_FLASH_BLANK_CHECK 0x01
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#define MPC55XX_FLASH_UNLOCK 0x02
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#define MPC55XX_FLASH_ERASE 0x04
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#define MPC55XX_FLASH_PROGRAM 0x08
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#define MPC55XX_FLASH_VERIFY 0x10
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/* Error returns. CONFIG or SIZE might mean you just
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* need to check for new configuration bits.
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* SIZE and RANGE mean you are outside of a known flash region.
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* ERASE means the erase failed,
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* PROGRAM means the program failed,
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* BLANK means it wasn't blank and BLANK_CHECK was specified,
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* VERIFY means VERIFY was set and it didn't match the source,
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* and LOCK means either the locking failed or you needed to
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* specify MPC55XX_FLASH_UNLOCK and didn't.
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*/
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#define MPC55XX_FLASH_CONFIG_ERR (-1)
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#define MPC55XX_FLASH_SIZE_ERR (-2)
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#define MPC55XX_FLASH_RANGE_ERR (-3)
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#define MPC55XX_FLASH_ERASE_ERR (-4)
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#define MPC55XX_FLASH_PROGRAM_ERR (-5)
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#define MPC55XX_FLASH_NOT_BLANK_ERR (-6)
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#define MPC55XX_FLASH_VERIFY_ERR (-7)
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#define MPC55XX_FLASH_LOCK_ERR (-8)
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#define MPC55XX_CACHE_ALIGNED_MASK ((uintptr_t) 0x1f)
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#define MPC55XX_CACHE_LINE_SIZE 32
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/**
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* @brief Returns true if the buffer starting at @a s of size @a n is cache aligned.
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*/
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static inline int mpc55xx_is_cache_aligned( const void *s, size_t n)
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{
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return !(((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) || (n & MPC55XX_CACHE_ALIGNED_MASK));
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}
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static inline uintptr_t mpc55xx_cache_aligned_start( const void *s)
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{
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return ((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) ? (((uintptr_t) s & ~MPC55XX_CACHE_ALIGNED_MASK) + MPC55XX_CACHE_LINE_SIZE) : (uintptr_t)s;
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}
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static inline size_t mpc55xx_non_cache_aligned_size( const void *s)
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{
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return (uintptr_t) mpc55xx_cache_aligned_start( s) - (uintptr_t) s;
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}
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static inline size_t mpc55xx_cache_aligned_size( const void *s, size_t n)
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{
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return (n - mpc55xx_non_cache_aligned_size( s)) & ~MPC55XX_CACHE_ALIGNED_MASK;
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}
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/**
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* @brief Returns the number of leading zeros.
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*/
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static inline uint32_t mpc55xx_count_leading_zeros( uint32_t value)
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{
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uint32_t count;
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__asm__ (
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"cntlzw %0, %1;"
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: "=r" (count)
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: "r" (value)
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);
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return count;
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}
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static inline void mpc55xx_wait_for_interrupt(void)
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{
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#ifdef MPC55XX_HAS_WAIT_INSTRUCTION
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__asm__ volatile ("wait");
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#else
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__asm__ volatile ("");
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#endif
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}
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static inline void mpc55xx_mmu_apply_config(const struct MMU_tag *config)
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{
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PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, config->MAS0.R);
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PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, config->MAS1.R);
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PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, config->MAS2.R);
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PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, config->MAS3.R);
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__asm__ volatile ("tlbwe");
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}
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBCPU_POWERPC_MPC55XX_H */
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