forked from Imagelibrary/rtems
b17830622a
* ChangeLog, Makefile.am, README, acinclude.m4, configure.ac, shared/clock/ckinit.c, shared/clock/clock.h, shared/console/console.c, shared/console/uart.c, shared/console/uart.h, shared/start/start.S, shared/startup/bspstart.c, shared/startup/setvec.c, shared/timer/timer.c, shared/tsmac/dp83848phy.h, shared/tsmac/tsmac.c, shared/tsmac/tsmac.h: New files.
90 lines
2.3 KiB
C
90 lines
2.3 KiB
C
/*
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* This file contains definitions for LatticeMico32 UART
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*
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* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
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* Micro-Research Finland Oy
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*/
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#ifndef _BSPUART_H
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#define _BSPUART_H
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void BSP_uart_init(int baud);
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/* Receive buffer register / transmit holding register */
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#define LM32_UART_RBR (0x0000)
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/* Interrupt enable register */
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#define LM32_UART_IER (0x0004)
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#define LM32_UART_IER_RBRI (0x0001)
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#define LM32_UART_IER_THRI (0x0002)
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#define LM32_UART_IER_RLSI (0x0004)
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#define LM32_UART_IER_MSI (0x0008)
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/* Interrupt identification register */
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#define LM32_UART_IIR (0x0008)
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#define LM32_UART_IIR_STAT (0x0001)
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#define LM32_UART_IIR_ID0 (0x0002)
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#define LM32_UART_IIR_ID1 (0x0004)
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/* Line control register */
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#define LM32_UART_LCR (0x000C)
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#define LM32_UART_LCR_WLS0 (0x0001)
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#define LM32_UART_LCR_WLS1 (0x0002)
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#define LM32_UART_LCR_STB (0x0004)
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#define LM32_UART_LCR_PEN (0x0008)
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#define LM32_UART_LCR_EPS (0x0010)
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#define LM32_UART_LCR_SP (0x0020)
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#define LM32_UART_LCR_SB (0x0040)
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#define LM32_UART_LCR_5BIT (0)
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#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
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#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
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#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
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/* Modem control register */
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#define LM32_UART_MCR (0x0010)
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#define LM32_UART_MCR_DTR (0x0001)
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#define LM32_UART_MCR_RTS (0x0002)
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/* Line status register */
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#define LM32_UART_LSR (0x0014)
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#define LM32_UART_LSR_DR (0x0001)
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#define LM32_UART_LSR_OE (0x0002)
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#define LM32_UART_LSR_PE (0x0004)
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#define LM32_UART_LSR_FE (0x0008)
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#define LM32_UART_LSR_BI (0x0010)
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#define LM32_UART_LSR_THRE (0x0020)
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#define LM32_UART_LSR_TEMT (0x0040)
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/* Modem status register */
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#define LM32_UART_MSR (0x0018)
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#define LM32_UART_MSR_DCTS (0x0001)
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#define LM32_UART_MSR_DDSR (0x0002)
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#define LM32_UART_MSR_TERI (0x0004)
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#define LM32_UART_MSR_DDCD (0x0008)
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#define LM32_UART_MSR_CTS (0x0010)
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#define LM32_UART_MSR_DSR (0x0020)
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#define LM32_UART_MSR_RI (0x0040)
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#define LM32_UART_MSR_DCD (0x0000)
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/* Baud-rate divisor register */
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#define LM32_UART_DIV (0x001C)
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#endif /* _BSPUART_H */
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