forked from Imagelibrary/rtems
af73b7b64b
Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
141 lines
3.7 KiB
C
141 lines
3.7 KiB
C
/**
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* @file
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* @ingroup stm32f4_interrupt
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* @brief Interrupt definitions.
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*/
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/*
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* Copyright (c) 2012 Sebastian Huber. All rights reserved.
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*
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_ARM_STM32F4_IRQ_H
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#define LIBBSP_ARM_STM32F4_IRQ_H
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#ifndef ASM
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#include <rtems.h>
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#include <rtems/irq.h>
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#include <rtems/irq-extension.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* ASM */
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/**
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* @defgroup stm32f4_interrupt Interrupt Support
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* @ingroup RTEMSBSPsARMSTM32F4
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* @brief Interrupt Support
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* @{
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*/
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#define STM32F4_IRQ_WWDG 0
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#define STM32F4_IRQ_PVD 1
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#define STM32F4_IRQ_TAMP_STAMP 2
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#define STM32F4_IRQ_RTC_WKUP 3
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#define STM32F4_IRQ_FLASH 4
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#define STM32F4_IRQ_RCC 5
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#define STM32F4_IRQ_EXTI0 6
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#define STM32F4_IRQ_EXTI1 7
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#define STM32F4_IRQ_EXTI2 8
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#define STM32F4_IRQ_EXTI3 9
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#define STM32F4_IRQ_EXTI4 10
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#define STM32F4_IRQ_DMA1_STREAM0 11
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#define STM32F4_IRQ_DMA1_STREAM1 12
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#define STM32F4_IRQ_DMA1_STREAM2 13
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#define STM32F4_IRQ_DMA1_STREAM3 14
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#define STM32F4_IRQ_DMA1_STREAM4 15
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#define STM32F4_IRQ_DMA1_STREAM5 16
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#define STM32F4_IRQ_DMA1_STREAM6 17
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#define STM32F4_IRQ_ADC 18
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#define STM32F4_IRQ_CAN1_TX 19
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#define STM32F4_IRQ_CAN1_RX0 20
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#define STM32F4_IRQ_CAN1_RX1 21
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#define STM32F4_IRQ_CAN1_SCE 22
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#define STM32F4_IRQ_EXTI9_5 23
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#define STM32F4_IRQ_TIM1_BRK_TIM9 24
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#define STM32F4_IRQ_TIM1_UP_TIM10 25
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#define STM32F4_IRQ_TIM1_TRG_COM_TIM11 26
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#define STM32F4_IRQ_TIM1_CC 27
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#define STM32F4_IRQ_TIM2 28
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#define STM32F4_IRQ_TIM3 29
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#define STM32F4_IRQ_TIM4 30
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#define STM32F4_IRQ_I2C1_EV 31
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#define STM32F4_IRQ_I2C1_ER 32
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#define STM32F4_IRQ_I2C2_EV 33
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#define STM32F4_IRQ_I2C2_ER 34
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#define STM32F4_IRQ_SPI1 35
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#define STM32F4_IRQ_SPI2 36
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#define STM32F4_IRQ_USART1 37
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#define STM32F4_IRQ_USART2 38
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#define STM32F4_IRQ_USART3 39
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#define STM32F4_IRQ_EXTI15_10 40
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#define STM32F4_IRQ_RTC_ALARM 41
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#define STM32F4_IRQ_OTG_FS_WKUP 42
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#define STM32F4_IRQ_TIM8_BRK_TIM12 43
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#define STM32F4_IRQ_TIM8_UP_TIM13 44
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#define STM32F4_IRQ_TIM8_TRG_COM_TIM14 45
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#define STM32F4_IRQ_TIM8_CC 46
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#define STM32F4_IRQ_DMA1_STREAM7 47
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#define STM32F4_IRQ_FSMC 48
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#define STM32F4_IRQ_SDIO 49
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#define STM32F4_IRQ_TIM5 50
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#define STM32F4_IRQ_SPI3 51
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#define STM32F4_IRQ_UART4 52
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#define STM32F4_IRQ_UART5 53
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#define STM32F4_IRQ_TIM6_DAC 54
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#define STM32F4_IRQ_TIM7 55
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#define STM32F4_IRQ_DMA2_STREAM0 56
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#define STM32F4_IRQ_DMA2_STREAM1 57
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#define STM32F4_IRQ_DMA2_STREAM2 58
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#define STM32F4_IRQ_DMA2_STREAM3 59
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#define STM32F4_IRQ_DMA2_STREAM4 60
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#define STM32F4_IRQ_ETH 61
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#define STM32F4_IRQ_ETH_WKUP 62
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#define STM32F4_IRQ_CAN2_TX 63
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#define STM32F4_IRQ_CAN2_RX0 64
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#define STM32F4_IRQ_CAN2_RX1 65
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#define STM32F4_IRQ_CAN2_SCE 66
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#define STM32F4_IRQ_OTG_FS 67
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#define STM32F4_IRQ_DMA2_STREAM5 68
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#define STM32F4_IRQ_DMA2_STREAM6 69
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#define STM32F4_IRQ_DMA2_STREAM7 70
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#define STM32F4_IRQ_USART6 71
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#define STM32F4_IRQ_I2C3_EV 72
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#define STM32F4_IRQ_I2C3_ER 73
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#define STM32F4_IRQ_OTG_HS_EP1_OUT 74
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#define STM32F4_IRQ_OTG_HS_EP1_IN 75
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#define STM32F4_IRQ_OTG_HS_WKUP 76
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#define STM32F4_IRQ_OTG_HS 77
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#define STM32F4_IRQ_DCMI 78
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#define STM32F4_IRQ_CRYP 79
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#define STM32F4_IRQ_HASH_RNG 80
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#define STM32F4_IRQ_FPU 81
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#define STM32F4_IRQ_PRIORITY_VALUE_MIN 0
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#define STM32F4_IRQ_PRIORITY_VALUE_MAX 15
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#define STM32F4_IRQ_PRIORITY_COUNT (STM32F4_IRQ_PRIORITY_VALUE_MAX + 1)
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#define STM32F4_IRQ_PRIORITY_HIGHEST STM32F4_IRQ_PRIORITY_VALUE_MIN
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#define STM32F4_IRQ_PRIORITY_LOWEST STM32F4_IRQ_PRIORITY_VALUE_MAX
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#define BSP_INTERRUPT_VECTOR_MAX 81
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/** @} */
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#endif /* LIBBSP_ARM_STM32F4_IRQ_H */
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