forked from Imagelibrary/rtems
ae88aa7927
This partially reverts commit 1215fd4d94.
In order to support profiling of SMP locks and provide a future
compatible SMP locks API it is necessary to add an SMP lock destroy
function. Since the commit above adds an SMP lock to each chain control
we would have to add a rtems_chain_destroy() function as well. This
complicates the chain usage dramatically. Thus revert the patch above.
A global SMP lock for all chains is used to implement the protected
chain operations.
Advantages:
* The SAPI chain API is now identical on SMP and non-SMP
configurations.
* The size of the chain control is reduced and is then equal to the
Score chains.
* The protected chain operations work correctly on SMP.
Disadvantage:
* Applications using many different chains and the protected operations
may notice lock contention.
The chain control size drop is a huge benefit (SAPI chain controls are
66% larger than the Score chain controls). The only disadvantage is not
really a problem since these applications can use specific interrupt
locks and unprotected chain operations to avoid this issue.
This is the README file for libcpu. This directory contains reusable libraries which are CPU dependent but not target board dependent. For example, the PowerPC has an on CPU decrementer register which may be used by all PowerPC BSP's for the Clock and Timer Drivers. Other examples include the caching support for the m68k CPU models and MIPS CPU model exception vectoring routines. This level of support will make it easier for others developing embedded applications on a given CPU.