forked from Imagelibrary/rtems
357 lines
12 KiB
C
357 lines
12 KiB
C
/* irq.h
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*
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* This include file describe the data structure and the functions implemented
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* by rtems to write interrupt handlers.
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*
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* CopyRight (C) 1999 valette@crf.canon.fr
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*
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* This code is heavilly inspired by the public specification of STREAM V2
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* that can be found at :
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*
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* <http://www.chorus.com/Documentation/index.html> by following
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* the STREAM API Specification Document link.
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*
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* Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk>
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* Surrey Satellite Technology Limited
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* The interrupt handling on the mpc8260 seems quite different from
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* the 860 (I don't know the 860 well). Although some interrupts
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* are routed via the CPM irq and some are direct to the SIU they all
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* appear logically the same. Therefore I removed the distinction
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* between SIU and CPM interrupts.
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
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#define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
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#define BSP_ASM_IRQ_VECTOR_BASE 0x0
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#ifndef ASM
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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extern volatile unsigned int ppc_cached_irq_mask;
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*/
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/*
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* Symblolic IRQ names and related definitions.
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*/
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typedef enum {
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/* Base vector for our SIU IRQ handlers. */
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BSP_SIU_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE,
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/*
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* CPM IRQ handlers related definitions
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* CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
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*/
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BSP_CPM_IRQ_NUMBER = 64,
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BSP_CPM_IRQ_LOWEST_OFFSET = BSP_SIU_VECTOR_BASE,
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BSP_CPM_IRQ_MAX_OFFSET = BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
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/*
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* PowerPc exceptions handled as interrupt where a rtems managed interrupt
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* handler might be connected
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*/
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BSP_PROCESSOR_IRQ_NUMBER = 1,
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BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_CPM_IRQ_MAX_OFFSET + 1,
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BSP_PROCESSOR_IRQ_MAX_OFFSET = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
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/*
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* Summary
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*/
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BSP_IRQ_NUMBER = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
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BSP_LOWEST_OFFSET = BSP_CPM_IRQ_LOWEST_OFFSET,
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BSP_MAX_OFFSET = BSP_PROCESSOR_IRQ_MAX_OFFSET,
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/*
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* Some SIU IRQ symbolic name definition. Please note that
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* INT IRQ are defined but a single one will be used to
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* redirect all CPM interrupt.
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*
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* On the mpc8260 all this seems to be transparent. Although the
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* CPM, PIT and TMCNT interrupt may well be the only interrupts routed
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* to the SIU at the hardware level all of them appear as CPM interupts
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* to software apart from the registers for setting priority.
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*
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* The MPC8260 User Manual seems shot through with inconsistencies
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* about this whole area.
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*/
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/*
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* Some CPM IRQ symbolic name definition
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*/
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BSP_CPM_IRQ_ERROR = BSP_CPM_IRQ_LOWEST_OFFSET,
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BSP_CPM_IRQ_I2C = BSP_CPM_IRQ_LOWEST_OFFSET + 1,
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BSP_CPM_IRQ_SPI = BSP_CPM_IRQ_LOWEST_OFFSET + 2,
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BSP_CPM_IRQ_RISC_TIMERS = BSP_CPM_IRQ_LOWEST_OFFSET + 3,
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BSP_CPM_IRQ_SMC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 4,
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BSP_CPM_IRQ_SMC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 5,
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BSP_CPM_IRQ_IDMA1 = BSP_CPM_IRQ_LOWEST_OFFSET + 6,
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BSP_CPM_IRQ_IDMA2 = BSP_CPM_IRQ_LOWEST_OFFSET + 7,
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BSP_CPM_IRQ_IDMA3 = BSP_CPM_IRQ_LOWEST_OFFSET + 8,
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BSP_CPM_IRQ_IDMA4 = BSP_CPM_IRQ_LOWEST_OFFSET + 9,
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BSP_CPM_IRQ_SDMA = BSP_CPM_IRQ_LOWEST_OFFSET + 10,
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BSP_CPM_IRQ_TIMER_1 = BSP_CPM_IRQ_LOWEST_OFFSET + 12,
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BSP_CPM_IRQ_TIMER_2 = BSP_CPM_IRQ_LOWEST_OFFSET + 13,
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BSP_CPM_IRQ_TIMER_3 = BSP_CPM_IRQ_LOWEST_OFFSET + 14,
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BSP_CPM_IRQ_TIMER_4 = BSP_CPM_IRQ_LOWEST_OFFSET + 15,
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BSP_CPM_IRQ_TMCNT = BSP_CPM_IRQ_LOWEST_OFFSET + 16,
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BSP_CPM_IRQ_PIT = BSP_CPM_IRQ_LOWEST_OFFSET + 17,
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BSP_CPM_IRQ_IRQ1 = BSP_CPM_IRQ_LOWEST_OFFSET + 19,
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BSP_CPM_IRQ_IRQ2 = BSP_CPM_IRQ_LOWEST_OFFSET + 20,
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BSP_CPM_IRQ_IRQ3 = BSP_CPM_IRQ_LOWEST_OFFSET + 21,
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BSP_CPM_IRQ_IRQ4 = BSP_CPM_IRQ_LOWEST_OFFSET + 22,
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BSP_CPM_IRQ_IRQ5 = BSP_CPM_IRQ_LOWEST_OFFSET + 23,
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BSP_CPM_IRQ_IRQ6 = BSP_CPM_IRQ_LOWEST_OFFSET + 24,
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BSP_CPM_IRQ_IRQ7 = BSP_CPM_IRQ_LOWEST_OFFSET + 25,
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BSP_CPM_IRQ_FCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 32,
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BSP_CPM_IRQ_FCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 33,
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BSP_CPM_IRQ_FCC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 34,
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BSP_CPM_IRQ_MCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 36,
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BSP_CPM_IRQ_MCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 37,
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BSP_CPM_IRQ_SCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 40,
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BSP_CPM_IRQ_SCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 41,
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BSP_CPM_IRQ_SCC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 42,
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BSP_CPM_IRQ_SCC4 = BSP_CPM_IRQ_LOWEST_OFFSET + 43,
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BSP_CPM_IRQ_PC15 = BSP_CPM_IRQ_LOWEST_OFFSET + 48,
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BSP_CPM_IRQ_PC14 = BSP_CPM_IRQ_LOWEST_OFFSET + 49,
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BSP_CPM_IRQ_PC13 = BSP_CPM_IRQ_LOWEST_OFFSET + 50,
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BSP_CPM_IRQ_PC12 = BSP_CPM_IRQ_LOWEST_OFFSET + 51,
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BSP_CPM_IRQ_PC11 = BSP_CPM_IRQ_LOWEST_OFFSET + 52,
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BSP_CPM_IRQ_PC10 = BSP_CPM_IRQ_LOWEST_OFFSET + 53,
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BSP_CPM_IRQ_PC9 = BSP_CPM_IRQ_LOWEST_OFFSET + 54,
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BSP_CPM_IRQ_PC8 = BSP_CPM_IRQ_LOWEST_OFFSET + 55,
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BSP_CPM_IRQ_PC7 = BSP_CPM_IRQ_LOWEST_OFFSET + 56,
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BSP_CPM_IRQ_PC6 = BSP_CPM_IRQ_LOWEST_OFFSET + 57,
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BSP_CPM_IRQ_PC5 = BSP_CPM_IRQ_LOWEST_OFFSET + 58,
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BSP_CPM_IRQ_PC4 = BSP_CPM_IRQ_LOWEST_OFFSET + 59,
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BSP_CPM_IRQ_PC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 60,
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BSP_CPM_IRQ_PC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 61,
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BSP_CPM_IRQ_PC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 62,
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BSP_CPM_IRQ_PC0 = BSP_CPM_IRQ_LOWEST_OFFSET + 63,
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/*
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* Some Processor exception handled as rtems IRQ symbolic name definition
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*/
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BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET,
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BSP_PERIODIC_TIMER = BSP_DECREMENTER
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}rtems_irq_symbolic_name;
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#define CPM_INTERRUPT
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/*
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* Type definition for RTEMS managed interrupts
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*/
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typedef unsigned char rtems_irq_prio;
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struct __rtems_irq_connect_data__; /* forward declaratiuon */
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typedef void (*rtems_irq_hdl) (void);
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typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*);
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typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*);
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typedef int (*rtems_irq_is_enabled) (const struct __rtems_irq_connect_data__*);
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typedef struct __rtems_irq_connect_data__ {
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/*
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* IRQ line
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*/
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rtems_irq_symbolic_name name;
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/*
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* handler. See comment on handler properties below in function prototype.
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*/
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rtems_irq_hdl hdl;
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/*
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* function for enabling interrupts at device level (ONLY!).
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* The BSP code will automatically enable it at SIU level and CPM level.
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* RATIONALE : anyway such code has to exist in current driver code.
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* It is usually called immediately AFTER connecting the interrupt handler.
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* RTEMS may well need such a function when restoring normal interrupt
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* processing after a debug session.
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*
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*/
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rtems_irq_enable on;
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/*
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* function for disabling interrupts at device level (ONLY!).
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* The code will disable it at SIU and CPM level. RATIONALE : anyway
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* such code has to exist for clean shutdown. It is usually called
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* BEFORE disconnecting the interrupt. RTEMS may well need such
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* a function when disabling normal interrupt processing for
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* a debug session. May well be a NOP function.
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*/
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rtems_irq_disable off;
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/*
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* function enabling to know what interrupt may currently occur
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* if someone manipulates the i8259s interrupt mask without care...
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*/
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rtems_irq_is_enabled isOn;
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} rtems_irq_connect_data;
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typedef struct {
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/*
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* size of all the table fields (*Tbl) described below.
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*/
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unsigned int irqNb;
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/*
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* Default handler used when disconnecting interrupts.
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*/
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rtems_irq_connect_data defaultEntry;
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/*
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* Table containing initials/current value.
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*/
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rtems_irq_connect_data* irqHdlTbl;
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/*
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* actual value of BSP_SIU_IRQ_VECTOR_BASE...
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*/
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rtems_irq_symbolic_name irqBase;
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/*
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* software priorities associated with interrupts.
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* if irqPrio [i] > intrPrio [j] it means that
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* interrupt handler hdl connected for interrupt name i
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* will not be interrupted by the handler connected for interrupt j
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* The interrupt source will be physically masked at i8259 level.
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*/
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rtems_irq_prio* irqPrioTbl;
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}rtems_irq_global_settings;
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/*-------------------------------------------------------------------------+
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| Function Prototypes.
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+--------------------------------------------------------------------------*/
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/*
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* ------------------------ PPC CPM Mngt Routines -------
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*/
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/*
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* function to disable a particular irq. After calling
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* this function, even if the device asserts the interrupt line it will
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* not be propagated further to the processor
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*/
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int BSP_irq_disable_at_cpm (const rtems_irq_symbolic_name irqLine);
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/*
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* function to enable a particular irq. After calling
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* this function, if the device asserts the interrupt line it will
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* be propagated further to the processor
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*/
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int BSP_irq_enable_at_cpm (const rtems_irq_symbolic_name irqLine);
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/*
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* function to acknoledge a particular irq. After calling
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* this function, if a device asserts an enabled interrupt line it will
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* be propagated further to the processor. Mainly usefull for people
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* writting raw handlers as this is automagically done for rtems managed
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* handlers.
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*/
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int BSP_irq_ack_at_cpm (const rtems_irq_symbolic_name irqLine);
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/*
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* function to check if a particular irq is enabled. After calling
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*/
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int BSP_irq_enabled_at_cpm (const rtems_irq_symbolic_name irqLine);
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/*
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* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
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*/
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/*
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* function to connect a particular irq handler. This hanlder will NOT be called
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* directly as the result of the corresponding interrupt. Instead, a RTEMS
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* irq prologue will be called that will :
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*
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* 1) save the C scratch registers,
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* 2) switch to a interrupt stack if the interrupt is not nested,
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* 4) modify them to disable the current interrupt at SIU level (and may
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* be others depending on software priorities)
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* 5) aknowledge the SIU',
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* 6) demask the processor,
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* 7) call the application handler
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*
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* As a result the hdl function provided
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*
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* a) can perfectly be written is C,
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* b) may also well directly call the part of the RTEMS API that can be used
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* from interrupt level,
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* c) It only responsible for handling the jobs that need to be done at
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* the device level including (aknowledging/re-enabling the interrupt at device,
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* level, getting the data,...)
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*
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* When returning from the function, the following will be performed by
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* the RTEMS irq epilogue :
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*
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* 1) masks the interrupts again,
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* 2) restore the original SIU interrupt masks
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* 3) switch back on the orinal stack if needed,
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* 4) perform rescheduling when necessary,
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* 5) restore the C scratch registers...
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* 6) restore initial execution flow
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*
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*/
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int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*);
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/*
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* function to get the current RTEMS irq handler for ptr->name. It enables to
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* define hanlder chain...
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*/
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int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr);
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/*
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* function to get disconnect the RTEMS irq handler for ptr->name.
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* This function checks that the value given is the current one for safety reason.
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* The user can use the previous function to get it.
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*/
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int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*);
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/*
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* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
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*/
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/*
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* (Re) Initialize the RTEMS interrupt management.
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*
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* The result of calling this function will be the same as if each individual
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* handler (config->irqHdlTbl[i].hdl) different from "config->defaultEntry.hdl"
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* has been individualy connected via
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* BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
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* And each handler currently equal to config->defaultEntry.hdl
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* has been previously disconnected via
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* BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
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*
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* This is to say that all information given will be used and not just
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* only the space.
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*
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* CAUTION : the various table address contained in config will be used
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* directly by the interrupt mangement code in order to save
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* data size so they must stay valid after the call => they should
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* not be modified or declared on a stack.
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*/
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int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
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/*
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* (Re) get info on current RTEMS interrupt management.
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*/
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int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
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extern void BSP_rtems_irq_mng_init(unsigned cpuId);
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#ifdef __cplusplus
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extern "C" {
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#endif
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#endif
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#endif
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