forked from Imagelibrary/rtems
511dc4b2be
Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).
This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.
This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.
Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).
The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.
The initialization stack can reuse the interrupt stack, since
* interrupts are disabled during the sequential system initialization,
and
* the boot_card() function does not return.
This stack resuse saves memory.
Changes per architecture:
arm:
* Mostly replace the linker symbol based configuration of stacks with
the standard <rtems/confdefs.h> configuration via
CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND
mode stack is still defined via linker symbols. These modes are
rarely used in applications and the default values provided by the
BSP should be sufficient in most cases.
* Remove the bsp_processor_count linker symbol hack used for the SMP
support. This is possible since the interrupt stack area is now
allocated by the linker and not allocated from the heap. This makes
some configure.ac stuff obsolete. Remove the now superfluous BSP
variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.
bfin:
* Remove unused magic linker command file allocation of initialization
stack. Maybe a previous linker command file copy and paste problem?
In the start.S the initialization stack is set to a hard coded value.
lm32, m32c, mips, nios2, riscv, sh, v850:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
m68k:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
powerpc:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
* Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
stack on BSPs using the shared linkcmds.base (replacement for
REGION_RWEXTRA).
sparc:
* Remove the hard coded initialization stack. Use the interrupt stack
for the initialization stack on the boot processor. This saves
16KiB of RAM.
Update #3459.
184 lines
4.1 KiB
ArmAsm
184 lines
4.1 KiB
ArmAsm
/*
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Copyright (c) 2005 Red Hat Incorporated.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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The name of Red Hat Incorporated may not be used to endorse
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or promote products derived from this software without specific
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prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#if defined(__r8c_cpu__) || defined(__m16c_cpu__)
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#define A16
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#define A(n,w) n
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#define W w
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#define ALIGN 1
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#else
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#define A24
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#define A(n,w) w
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#define W l
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#define ALIGN 2
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#endif
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.text
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.global _start
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_start:
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.LFB2:
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fset U /* User stack */
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ldc #__Configuration_Interrupt_stack_area_end,sp
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#ifdef A16
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mov.b #%hi8(__romdatastart),r1h
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mov.w #%lo16(__romdatastart),a0
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mov.w #__datastart,a1
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#else
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mov.l #__romdatastart,a0
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mov.l #__datastart,a1
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#endif
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mov.w #__romdatacopysize,r3
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shl.w #-1,r3
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smovf.w
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#ifdef A16
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mov.w #__bssstart,a1
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#else
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mov.l #__bssstart,a1
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#endif
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mov.w #__bsssize,r3
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shl.w #-1,r3
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mov.w #0,r0
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sstr.w
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/* jsr.a __m32c_init */
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jsr.a _boot_card
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.LFE2:
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#ifdef A24
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/* rv in r0, ok for arg0 */
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#else
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mov.w r0,r1
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#endif
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.global _bsp_reset
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_bsp_reset:
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jsr.a _sys_exit
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.text
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.global _m32c_run_preinit_array
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.type _m32c_run_preinit_array,@function
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_m32c_run_preinit_array:
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mov.W #__preinit_array_start,a0
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mov.W #__preinit_array_end,a1
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jmp.w _m32c_run_inilist
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.global _m32c_run_init_array
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.type _m32c_run_init_array,@function
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_m32c_run_init_array:
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mov.W #__init_array_start,a0
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mov.W #__init_array_end,a1
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jmp.w _m32c_run_inilist
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.global _m32c_run_fini_array
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.type _m32c_run_fini_array,@function
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_m32c_run_fini_array:
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mov.W #__fini_array_start,a0
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mov.W #__fini_array_end,a1
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/* fall through */
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_m32c_run_inilist:
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next_inilist:
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cmp.W a0,a1
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jeq done_inilist
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pushm a0,a1
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mov.W [a0],a0
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#ifdef A16
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mov.b:s #0,a1 /* zero extends */
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jsri.a a1a0
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#else
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jsri.a a0
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#endif
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popm a0,a1
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add.W A(#2,#4),a0
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jmp.b next_inilist
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done_inilist:
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rts
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.section .init,"ax",@progbits
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.global __init
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.global __m32c_init
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__init:
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__m32c_init:
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enter #0
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exitd
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.section .fini,"ax",@progbits
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.global __fini
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.global __m32c_fini
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__fini:
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__m32c_fini:
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enter #0
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jsr.a _m32c_run_fini_array
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exitd
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;;; Provide Dwarf unwinding information that will help GDB stop
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;;; backtraces at the right place. This is stolen from assembly
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;;; code generated by GCC with -dA.
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.section .debug_frame,"",@progbits
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.Lframe0:
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.4byte .LECIE0-.LSCIE0 ; Length of Common Information Entry
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.LSCIE0:
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.4byte 0xffffffff ; CIE Identifier Tag
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.byte 0x1 ; CIE Version
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.ascii "\0" ; CIE Augmentation
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.uleb128 0x1 ; CIE Code Alignment Factor
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.sleb128 -1 ; CIE Data Alignment Factor
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.byte 0xd ; CIE RA Column
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.byte 0xc ; DW_CFA_def_cfa
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.uleb128 0xc
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.uleb128 0x3
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.byte 0x8d ; DW_CFA_offset, column 0xd
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.uleb128 0x3
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.p2align ALIGN
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.LECIE0:
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.LSFDE0:
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.4byte .LEFDE0-.LASFDE0 ; FDE Length
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.LASFDE0:
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.4byte .Lframe0 ; FDE CIE offset
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.4byte .LFB2 ; FDE initial location
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.4byte .LFE2-.LFB2 ; FDE address range
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.byte 0xf ; DW_CFA_def_cfa_expression
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.uleb128 1 ; length of expression
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.byte 0x30 ; DW_OP_lit0
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.p2align ALIGN
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.LEFDE0:
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.text
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