Files
rtems/bsps/m32c/m32cbsp/start/linkcmds
Sebastian Huber 511dc4b2be Rework initialization and interrupt stack support
Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>.  Place the
interrupt stack area in a special section ".rtemsstack.interrupt".  Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures.  There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack().  Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  * interrupts are disabled during the sequential system initialization,
    and

  * the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  * Mostly replace the linker symbol based configuration of stacks with
    the standard <rtems/confdefs.h> configuration via
    CONFIGURE_INTERRUPT_STACK_SIZE.  The size of the FIQ, ABT and UND
    mode stack is still defined via linker symbols.  These modes are
    rarely used in applications and the default values provided by the
    BSP should be sufficient in most cases.

  * Remove the bsp_processor_count linker symbol hack used for the SMP
    support. This is possible since the interrupt stack area is now
    allocated by the linker and not allocated from the heap.  This makes
    some configure.ac stuff obsolete.  Remove the now superfluous BSP
    variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  * Remove unused magic linker command file allocation of initialization
    stack.  Maybe a previous linker command file copy and paste problem?
    In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

m68k:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

powerpc:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

  * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
    stack on BSPs using the shared linkcmds.base (replacement for
    REGION_RWEXTRA).

sparc:

  * Remove the hard coded initialization stack.  Use the interrupt stack
    for the initialization stack on the boot processor.  This saves
    16KiB of RAM.

Update #3459.
2018-06-27 08:58:16 +02:00

208 lines
6.5 KiB
Plaintext

/*
* Declare some sizes.
*/
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x200000;
_RamSize = DEFINED(_RamSize) ? _RamSize : 0x800000;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-m32c", "elf32-m32c",
"elf32-m32c")
OUTPUT_ARCH(m32c)
ENTRY(_start)
STARTUP(start.o)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
MEMORY {
RAM (w) : ORIGIN = 0x200000, LENGTH = 0x800000
VEC (r) : ORIGIN = 0xffffdc, LENGTH = 32
RESETVEC (r) : ORIGIN = 0xfffffc, LENGTH = 4
}
SECTIONS
{
/* There are three cases we care about: First, RW data that must be
in the low 64k. This will always be copied from ROM. Second, RO
data that must be in the low 64k. This may be copied from ROM if
the ROM is above 64k. Third, anything that does not need to be
in the first 64k. Chips normally only have two memory regions;
low ram and either high or low rom. We map the low rom needs
into one of the actual regions. */
/* .text goes first so the rom image of ram data will follow it. */
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
} > RAM =0
/* rodata will either be part of data, or will be in low rom. So we
might be spanning it, or we might not. This lets us include it
in our calculations when appropriate. */
.rodata : {
. = ALIGN(2);
*(.plt)
KEEP (*(.init))
KEEP (*(.fini))
*(.rodata .rodata.* .gnu.linkonce.r.*)
KEEP (*(SORT(.rtemsroset.*)))
*(.rodata1)
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
. = ALIGN(2);
PROVIDE(__romdatastart = .); /* IF_ROROM */
} > RAM
.tdata : {
__TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
__TLS_Data_end = .;
} > RAM
.tbss : {
__TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
__TLS_BSS_end = .;
} > RAM
__TLS_Data_size = __TLS_Data_end - __TLS_Data_begin;
__TLS_Data_begin = __TLS_Data_size != 0 ? __TLS_Data_begin : __TLS_BSS_begin;
__TLS_Data_end = __TLS_Data_size != 0 ? __TLS_Data_end : __TLS_BSS_begin;
__TLS_BSS_size = __TLS_BSS_end - __TLS_BSS_begin;
__TLS_Size = __TLS_BSS_end - __TLS_Data_begin;
__TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.data : {
. = ALIGN(32 / 8);
PROVIDE (__datastart = .); /* IF_ROROM */
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
PROVIDE (__fini_array_end = .);
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(SORT(.rtemsrwset.*)))
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM
/* Note that __romdatacopysize may be ZERO for the simulator, which
knows how to intialize RAM directly. It should ONLY be used for
copying data from ROM to RAM; if you need to know the size of the
data section, subtract the end symbol from the start symbol. */
/* Note that crt0 assumes this is even; all the start/stop symbols
are also assumed word-aligned. */
PROVIDE (__romdatacopysize = 0);
.bss : {
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(2);
PROVIDE (__bssend = .);
_end = .;
PROVIDE (end = .);
} > RAM
PROVIDE (__bsssize = 0);
.rtemsstack (NOLOAD) : {
*(SORT(.rtemsstack.*))
} > RAM
PROVIDE (_WorkAreaBase = .);
. = 0xa00000;
PROVIDE (_WorkAreaEnd = .);
PROVIDE (_WorkAreaSize = _WorkAreaEnd - _WorkAreaBase);
.vec : {
*(.vec)
} > VEC
.resetvec : {
*(.resetvec)
} > RESETVEC
/* The rest are all not normally part of the runtime image. */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}