forked from Imagelibrary/rtems
43 lines
1.1 KiB
Plaintext
43 lines
1.1 KiB
Plaintext
17 Februrary 2011
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XXX
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This is a BSP for the MIPS Malta board with a 24K CPU on it.
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It has ONLY been tested on Qemu.
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Anything not mentioned has not been touched at all and will
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most likely not be in the first release of the BSP.
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Working
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=======
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+ Board initialization and shutdown
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+ tty0 working polled
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+ tty1 working polled (see note in issues)
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+ tty2 working polled (see notes in issues)
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+ Clock Tick
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Issues
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======
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+ We have small hack to Qemu so reset will exit. This needs to be
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fixed to follow the PC386 Qemu model where a command line argument
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selects reset or exit on reset.
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+ tty2 is generating an interrupt which causes a TLB fault. We have
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disabled the interrupt in the CPU interrupt mask for now.
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+ tty1 and tty2 are not showing any data on the screen. This is
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most likely an issue with qemu since the status bit is changing
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as the characters are polled out.
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TBD
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===
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+ Conversion to Programmable Interrupt Controller IRQ model
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using shared infrastructure
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+ tty0 working interrupt driver
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+ tty1 working interrupt driver
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+ tty2 working interrupt driver
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+ PCI Bus Support
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+ AMD AM79C973 NIC
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+ Consider moving mips_interrupt_mask() into BSP.
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