Sebastian Huber e58ecb8433 bsps/arm: Initialize priorities of PPIs ...

At least on GICv1 the interrupts 0 up to including 31 are so called
Peripheral Private Interrupts (PPIs).  We have to initialize the
priority of the PPIs on secondary processors.

2020-02-24 09:21:47 +01:00

..

cache

bsps: Adjust shared Doxygen groups

2019-03-08 07:42:54 +01:00

clock

bsps/arm: Unmask generic timer in interrupt handler

2019-12-05 07:25:52 +01:00

cp15

bsps/arm: Add support for small pages MMU

2019-10-31 09:48:05 +01:00

cpucounter

arm: Simplify CPU counter support

2018-06-15 13:12:05 +02:00

fb

bsps: Move arm-pl111-fb.c to bsps

2018-04-24 10:24:29 +02:00

irq

bsps/arm: Initialize priorities of PPIs

2020-02-24 09:21:47 +01:00

net

network: Use kernel/user space header files

2018-09-10 10:38:44 +02:00

serial

arm/xilinx-zynq: Split console driver files

2020-02-12 09:08:35 +01:00

start

score: Statically allocate idle/MPCI stacks

2020-02-12 09:08:36 +01:00

doxygen.h

bsps/arm: Adjust CMSIS Doxygen groups

2019-03-08 07:42:54 +01:00