forked from Imagelibrary/rtems
117 lines
3.2 KiB
C
117 lines
3.2 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsAArch64Shared
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*
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* @brief AArch64-specific ARM GPT system register accessors.
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*/
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/*
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* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
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* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dev/clock/arm-generic-timer.h>
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#include <bsp/irq.h>
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uint64_t arm_gt_clock_get_compare_value(void)
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{
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uint64_t val;
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__asm__ volatile (
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#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
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"mrs %[val], cntv_cval_el0"
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#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
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"mrs %[val], cntps_cval_el1"
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#else
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"mrs %[val], cntp_cval_el0"
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#endif
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: [val] "=&r" (val)
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);
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return val;
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}
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void arm_gt_clock_set_compare_value(uint64_t cval)
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{
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__asm__ volatile (
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#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
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"msr cntv_cval_el0, %[cval]"
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#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
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"msr cntps_cval_el1, %[cval]"
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#else
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"msr cntp_cval_el0, %[cval]"
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#endif
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:
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: [cval] "r" (cval)
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);
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}
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uint64_t arm_gt_clock_get_count(void)
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{
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uint64_t val;
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__asm__ volatile (
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#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
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"mrs %[val], cntvct_el0"
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#else
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"mrs %[val], cntpct_el0"
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#endif
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: [val] "=&r" (val)
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);
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return val;
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}
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void arm_gt_clock_set_control(uint32_t ctl)
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{
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__asm__ volatile (
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#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
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"msr cntv_ctl_el0, %[ctl]"
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#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
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"msr cntps_ctl_el1, %[ctl]"
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#else
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"msr cntp_ctl_el0, %[ctl]"
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#endif
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:
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: [ctl] "r" (ctl)
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);
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}
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void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
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{
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uint64_t val;
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__asm__ volatile (
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"mrs %[val], cntfrq_el0"
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: [val] "=&r" (val)
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);
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*frequency = val;
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#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
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*irq = BSP_TIMER_VIRT_PPI;
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#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
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*irq = BSP_TIMER_PHYS_S_PPI;
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#else
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*irq = BSP_TIMER_PHYS_NS_PPI;
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#endif
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}
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